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Senior Principal Semiconductor Device Engineer, FinFET Technologies

NXP Semiconductors

On-site
Hsinchu
Full-time
Senior
Principal
8+ yrs
Salary not listedPosted 4w ago

Real job — pulled straight from NXP Semiconductors’s careers page · Verified July 17, 2026 · No reposts.

Job description

NXP Semiconductors is hiring a Senior Principal Semiconductor Device Engineer, FinFET Technologies — a full-time, based in Hsinchu role. Apply directly on NXP Semiconductors's careers page below.

Sr. Principal Semiconductor Device Engineer (FinFET Technologies)

Location: Hsinchu

Time Type: Full time

Job Description

Job Summary

We are seeking an experienced Sr. Principal Semiconductor Device Engineer to lead technology enablement in NXP in close collaboration with leading semiconductor foundries.

This role requires deep expertise in device physics, advanced node technologies, and silicon validation, combined with the ability to drive cross-functional programs and influence external partners. You will play a key role in defining device requirements, guiding technology development, and ensuring successful product execution from concept through high-volume manufacturing.

Key Responsibilities

Technology Leadership & Device Strategy

  • Define and drive device architecture, scaling strategies, and performance targets for advanced FinFET technologies
  • Lead device-level tradeoff analysis (performance, power, variability, reliability) across technology nodes
  • Provide technical leadership in design-technology co-optimization (DTCO) and influence product architecture decisions
  • Shape long-term device roadmap in alignment with product and foundry capabilities

Foundry Engagement & Technology Enablement

  • Act as the primary technical interface with external foundries (e.g., TSMC, Samsung)
  • Drive alignment on PDKs, device models, design rules, and process changes
  • Negotiate and influence device/process optimization strategies with foundry partners
  • Lead periodic technical reviews (QTR/QBR) and escalation for yield or performance issues

Silicon Analysis, Yield & Performance Optimization

  • Lead silicon validation and correlation (SPICE-to-silicon, TCAD-to-silicon)
  • Drive parametric yield improvement, variability reduction, and failure analysis
  • Identify root causes of performance/reliability issues and define corrective actions
  • Guide teams on statistical analysis, DOE strategy, and data interpretation

Cross-Functional Collaboration & Execution

  • Lead collaboration across device, process integration, circuit design, reliability, and product teams
  • Provide technical direction for test structures, characterization plans, and design enablement
  • Support tape-out readiness, product bring-up, and qualification
  • Mentor junior engineers and provide technical leadership across global teams

Program & Stakeholder Leadership

  • Drive complex, multi-site programs with external foundries and internal stakeholders
  • Communicate technical results and recommendations to executive leadership and partners
  • Balance technical risk, schedule, and business priorities to enable successful product delivery

Required Qualifications

Education

  • PhD in Electrical Engineering, Physics, Materials Science, or related field
    (MS with extensive experience also considered)

Experience

  • 8–12+ years of experience in semiconductor device engineering, technology development, or process integration
  • Proven track record in advanced CMOS/FinFET nodes (e.g., ≤16nm or equivalent complexity)
  • Demonstrated experience working with external semiconductor foundries in development and/or production

Technical Expertise

  • Deep understanding of semiconductor device physics and transistor behavior
  • Strong background in:
    • FinFET device architecture and scaling challenges
    • Device characterization (DC/AC), compact modeling, and variability
    • Yield analysis, failure analysis, and reliability physics
    • SPICE, TCAD, and data analysis tools
  • Experience with:
    • PDK/device model validation
    • Silicon debug and correlation
    • DOE and statistical analysis methodologies

Preferred Qualifications

  • Experience with 16nm and below nodes or emerging device architectures (e.g., GAA/nanosheet)
  • Background in DTCO and product-driven technology optimization
  • Familiarity with automotive-grade qualification (AEC-Q100) or high-reliability applications
  • Prior leadership of technology transfer or high-volume manufacturing ramp
  • Experience influencing foundry roadmaps or joint development programs

Leadership & Behavioral Competencies

  • Demonstrated ability to lead through influence (internal and external)
  • Strong technical judgment and decision-making under ambiguity
  • Ability to translate deep technical insights into business-relevant outcomes
  • Excellent communication skills across engineering and executive audiences
  • Proven track record of mentoring and scaling technical teams

Impact of the Role

  • Direct ownership of device technology success at advanced nodes
  • High visibility role with foundry partners in Hsinchu ecosystem
  • Significant influence on product competitiveness, cost, and manufacturability
  • Opportunity to shape next-generation semiconductor platforms


More information about NXP in Greater China...

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Frequently asked questions

What is the seniority level for Senior Principal Semiconductor Device Engineer, FinFET Technologies at NXP Semiconductors?

Senior Principal Semiconductor Device Engineer, FinFET Technologies at NXP Semiconductors is a Senior / Principal level position.

How do I apply for Senior Principal Semiconductor Device Engineer, FinFET Technologies at NXP Semiconductors?

You can view the full description and apply for Senior Principal Semiconductor Device Engineer, FinFET Technologies at NXP Semiconductors on EchoJobs: https://echojobs.io/job/nxp-semiconductors-sr-principal-semiconductor-device-engineer-finfet-technologies-lqwl5.