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ASIC Design Verification Engineer

Cisco

On-site
San Jose, CA
Full-time
Senior
4+ yrs
$168k–$282kPosted 16m ago

Real job — pulled straight from Cisco’s careers page · Verified October 18, 2026 · No reposts.

Job description

Cisco is hiring a ASIC Design Verification Engineer — a full-time, based in San Jose, CA role ($168k–$282k). Apply directly on Cisco's careers page below.

ASIC Design Verification Engineer

Location: San Jose, California, US

Remote Type: Onsite Only

Time Type: Full time

Job Description

The application window is expected to close on: 11/29/2026

Meet the Team

The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms—like Silicon One—are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world. 

Your Impact

  • Participate in the ASIC design verification for Cisco high-end switching products.

  • Perform end-to-end verification of design blocks and top-level

  • Develop simulation models, test plans, direct and random tests, code or functional coverage, multi-chip/system simulation, and performance analysis.

  • Construct testbenches components like scoreboard, agents, sequencers, and monitors.

  • Collaborate with the hardware, software designers, and vendors.

Minimum Qualifications

  • Bachelor's degree in electrical/computer science/computer engineering/related degree and 7+ years of related experience or Master's in electrical/computer science/computer engineering/related degree and 4+ years of related experience, or PhD in electrical/computer science/computer engineering/related degree + 1 year of related experience.

  • Experience in System Verilog/UVM.

  • Experience with ASIC design and verification processes, debugging, methodology, and tools.

  • Experience in verifying blocks/clusters/full chip level for ASIC.

Preferred Qualifications

  • Post-silicon lab bring-up experience.

  • Experience with Linux, C/C++, and/or Python/Perl.

  • Experience in Networking.

  • Experience with Formal verification.

Why Cisco? 

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. 

We are Cisco, and our power starts with you. 

Message to applicants applying to work in the U.S. and/or Canada:

The starting salary range posted for this position is $167,700.00 to $245,200.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.

Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.

U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.

U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:

  • 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees

  • 1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco

  • Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees

  • Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)

  • 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next

  • Additional paid time away may be requested to deal with critical or emergency issues for family members

  • Optional 10 paid days per full calendar year to volunteer

For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.

Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:

  • .75% of incentive target for each 1% of revenue attainment up to 50% of quota;

  • 1.5% of incentive target for each 1% of attainment between 50% and 75%;

  • 1% of incentive target for each 1% of attainment between 75% and 100%; and

  • Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.

The applicable full salary ranges for this position, by specific state, are listed below:

New York City Metro Area:

$167,700.00 - $282,000.00

Non-Metro New York state & Washington state:

$149,100.00 - $250,900.00

* For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.

** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

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Frequently asked questions

What is the salary for ASIC Design Verification Engineer at Cisco?

The estimated salary range for ASIC Design Verification Engineer at Cisco is $168,000 - $282,000 USD per year.

What skills are required for ASIC Design Verification Engineer at Cisco?

The required skills for ASIC Design Verification Engineer at Cisco include: SystemVerilog, Linux, C++, Python, Perl, Networking.

What is the seniority level for ASIC Design Verification Engineer at Cisco?

ASIC Design Verification Engineer at Cisco is a Senior level position.

How do I apply for ASIC Design Verification Engineer at Cisco?

You can view the full description and apply for ASIC Design Verification Engineer at Cisco on EchoJobs: https://echojobs.io/job/cisco-asic-design-verification-engineer-13hyg.