Physical Design Engineer

Location: San Jose, CA, us

Job Description

Job Title: Physical Design Engineer

Duties: We're seeking an experienced physical design engineer in the development of high-performance, low-power GPU top level design. Successful candidates are responsible for all aspects of physical design and implementation of Graphics processors. Responsibilities include participating in the efforts in establishing CAD and physical design methodologies (flow and tools development), chip floor plan, power/clock distribution, chip assembly and P&R, timing closure, power and noise analysis and back-end verification.

The qualified candidate will possess the following:

Candidates will be required to be familiar with industry CAD methodologies and guidelines using primarily Synopsys EDA tools for design and timing closure.

Hands on experience with Synopsys ICCII, PrimeTime, Design Compiler, MRV, Cadence Conformal.

Understanding of hardware description language such as SystemVerilog is a plus.

Candidate should possess a strong understanding of static timing analysis, clock/power distribution and analysis, RC Extraction and correlation, place and route, circuit design and analysis. Hands on experience on timing closure.

Scripting and programming experience using several of the following: Perl, C, C++, TCL, Scheme, Skill, and Make is a plus.

Good written/verbal communication skills, strong team work Motivated, self-directed and able to work effectively, both independently and in a team.

Education: Educational Degree: BS + CS/EE or relevant field

Min. years overall: 7+ years of industrial experience after BS/MS degree.

Additional Information

All your information will be kept confidential according to EEO guidelines.