
Real job — pulled straight from Verilab’s careers page · Verified October 15, 2026 · No reposts.
Job description
Verilab is hiring a Design Verification Engineer — a contract, based in Austin, TX role. Apply directly on Verilab's careers page below.
Design Verification Engineer - Contractor
Location: Austin, TX (US)
Experience Level: Senior
Description
Job Summary
Verilab is seeking an experienced verification engineer for a contract engagement supporting our clients with high quality verification services. Our projects span a diverse range of designs and application areas, including audio, automotive, communications, processors, space, and video.
As a contractor, you will contribute your expertise to verification planning and implementation, with responsibilities defined by the scope of the engagement. You will develop robust verification environments, address complex technical challenges, and help achieve project milestones and verification closure.
You will collaborate with Verilab consultants and client engineering teams, bringing technical insight, clear communication, and ownership of your deliverables. This is an opportunity to apply your experience to challenging designs while working alongside some of the most knowledgeable people in the industry.
Requirements
Key Qualifications
- BSc/MSc in Electronic Engineering, Computer Engineering, or Computer Science.
- At least 7 years of project-proven verification experience.
- Strong SystemVerilog/UVM development experience, including:
- Block and integration level verification.
- Development of coverage driven, self-checking verification environments from scratch.
- High level sequence based stimulus.
- Complex transaction based checkers, including scoreboards with data translation and ordering.
- Register models.
- Specification level checks for protocols such as AXI, DDRx, PCIe, and USBx.
- Demonstrated verification planning experience, including:
- Requirements capture and traceability.
- Effort estimation and prioritization.
- Use of metrics to assess progress and determine verification closure.
- Ability to take ownership of agreed deliverables, from planning through implementation.
- Experience meeting demanding project deadlines and resolving technical challenges.
- Effective communication and collaboration with consultants, clients, and engineering teams.
Other Interesting Qualifications
Benefits
Additional Requirements
Additional Requirements
- All candidates must be a US person (citizen or permanent resident).
- The ability to travel is required.
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Frequently asked questions
What skills are required for Design Verification Engineer at Verilab?
The required skills for Design Verification Engineer at Verilab include: SystemVerilog, PCIe.
What is the seniority level for Design Verification Engineer at Verilab?
Design Verification Engineer at Verilab is a Senior level position.
How do I apply for Design Verification Engineer at Verilab?
You can view the full description and apply for Design Verification Engineer at Verilab on EchoJobs: https://echojobs.io/job/verilab-design-verification-engineer-contractor-qlmk7.