Real job — pulled straight from Texas Instruments’s careers page · Verified June 26, 2026 · No reposts.
Job description
Texas Instruments is hiring a Design Verification Engineer — a full-time, based in India role. Apply directly on Texas Instruments's careers page below.
Design Verification Engineer Lead
Location: India
The RADAR product line is a rapidly expanding business within TI, investing to address the fast-growing segment in Industrial & automotive markets. This product line will enable a scalable portfolio using DSP and ARM multi-cores to support high-end applications in ADAS, body & Chassis and in Industrial space. Radar systems process digital information from sources like digital cameras, lasers, radar and other sensors to perform tasks such as lane departure warning or parking assistance. The processed information can be displayed on screens or announced via acoustical warning signals. The system has multifaceted features such as High precision ADC, extremely accurate chirp, wide range visibility and Faster scene processing abilities. As a Verification Engineer, you will play a pivotal role in ensuring the quality and reliability of our advanced RADAR products. You will be responsible for the verification of IP, Subsystem (SS), and System-on-Chip (SoC) designs, contributing to the development of robust verification methodologies and strategies.
Responsibilities:
Complete ownership of IP/subsystem/SOC DV ownership right from spec definition till the post silicon verification and solving the customer issues on need basis. This includes:
- Active involvement with architecture team during the spec definition phase
- Verification strategy definition along with Verification plan to meet 100% spec to regression traceability along with signoff metrics
- IP/SS/SOC verification covering functional and Firmware scenarios in RTL/PARTL, GLS/PAGLS modes.
- DV Environment ownership: TB development/enhancements including checkers and coverage monitor definitions along with DV flow updates as per the project needs
- Active collaboration with cross functional teams -Architecture, RTL, PD, DFT, Systems, Analog, FW and application teams -to enable the Verification goals for IP/Subsystem/SOC starting from spec definition till post silicon verification closure activities
- Final SoC DV signoff based on Regressions, coverage metrics, DV to spec traceability using C and/or SV-UVM adhering to ISO26262 guidelines
About Us
- Engineer your future. We empower our employees to truly own their career and development. Come collaborate with some of the smartest people in the world to shape the future of electronics.
- We're different by design. Diverse backgrounds and perspectives are what push innovation forward and what make TI stronger. We value each and every voice, and look forward to hearing yours. Meet the people of TI
- Benefits that benefit you. We offer competitive pay and benefits designed to help you and your family live your best life. Your well-being is important to us. Please find our country-specific benefits here
About the Organization
TI does not make recruiting or hiring decisions based on citizenship, immigration status or national origin. However, if TI determines that information access or export control restrictions based upon applicable laws and regulations would prohibit you from working in this position without first obtaining an export license, TI expressly reserves the right not to seek such a license for you and either offer you a different position that does not require an export license or decline to move forward with your employment.Get Design Verification Engineer jobs like this→
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Frequently asked questions
What is the seniority level for Design Verification Engineer at Texas Instruments?
Design Verification Engineer at Texas Instruments is a Mid Level level position.
How do I apply for Design Verification Engineer at Texas Instruments?
You can view the full description and apply for Design Verification Engineer at Texas Instruments on EchoJobs: https://echojobs.io/job/texas-instruments-design-verification-engineer-oultd.