Sr Engineer

Tenstorrent USA Inc:  Tenstorrent USA Inc seeks Sr. Engineer. Job site is located at 2600 Great America Way Suite 501, Santa Clara, CA 95054. The position requires a Bachelor’s Science (BS) in electrical engineering (EE), Electrical and Computer Engineering (ECE), computer engineering (CE), or Computer Science (CS) or a closely related field and 36 months in job offered or in related occupation. Alternative Requirements: Master’s of Science (MS) in electrical engineering (EE), Electrical and Computer Engineering (ECE), computer engineering (CE), or Computer Science (CS) or a closely related field and 24 months in job offered or in related occupation. Special Skills: Experience with verification methodologies and techniques & working in a Unix/Linux environment. Simulation/debug, TB development, stimulus, checking, formal, coverage, infrastructure, tools. Hands-on work in C++ or System Verilog programming for either hardware modeling or testbench development or projects of similar scope and complexity.

Job Duties:     Design verification of IP (e.g. CPU, Network-on-chip, etc.) and SOCs used in Core and ASICs. Develop and apply infrastructures, tools and methodologies for functional verification, design for test (DFT) verification, logical, physical and gate level verification/simulation. Apply verification constructs such as assertions and write code in disparateprogramming languages such as C/C++, Python, Perl, Verilog, System Verilog, assembly. Develop, deploy and use tools to source bugs in the RTL. Develop and apply infrastructures, tools and methodologies for functional verification, design for test (DFT) verification, logical, physical and gate level verification/simulation. Apply verification constructs such as assertions and write code in disparate programming languages such as C/C++, Python, Perl, Verilog, System Verilog, assembly. Utilize computer architecture, digital and circuit design to target the design and find functional errors in RTL/logic model and improve the design performance, power and other metrics. Scope out verification impact for architectural and microarchitectural features, develop test plans and verification environments at block, IP, chip level; including, stimulus, checkers, monitors, architectural models and other testbench components. This position will be hybrid, and the applicant can live within the MSA.

IF INTERESTED, PLEASE E-MAIL RESUMES:

Tenstorrent USA Inc:

Jessica Yu

jyu@tenstorrent.com

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