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Director R&D Engineering, Interface PHY / Ethernet SerDes

Synopsys

On-site
Ottawa, ON
Full-time
Director
Manager
15+ yrs
Salary not listedPosted 2w ago

Real job — pulled straight from Synopsys’s careers page · Verified July 30, 2026 · No reposts.

Job description

Synopsys is hiring a Director R&D Engineering, Interface PHY / Ethernet SerDes — a full-time, based in Ottawa, ON role. Apply directly on Synopsys's careers page below.

Senior Director R&D Engineering (Interface PHY / Ethernet SerDes)

Location: Ottawa, Ottawa (Hines Road), Canada

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.


You Are

You have spent your career building and leading teams that ship advanced SerDes IP, and you understand that execution is everything. The difference between a program that delivers and one that slips is usually a decision made six months earlier, and you are the kind of leader who sees it coming and adjusts before it becomes a crisis.

Managing distributed teams across time zones does not intimidate you. You create alignment between analog designers, verification engineers, and firmware developers while keeping customer commitments front and center. When silicon bring-up hits an unexpected issue, you are the person the team calls because you cut through noise and mobilize the right people without creating panic. At Synopsys, you will lead the team building 112G and 224G Ethernet SerDes IP that powers AI infrastructure and hyperscale data centers.


What You'll Be Doing

  • Lead an R&D organization developing 112G/224G Ethernet SerDes and Interface PHY IP for AI/HPC, networking, and data center markets
  • Own execution planning, staffing, and delivery commitments across multiple concurrent programs and customer milestones
  • Drive technical alignment across architecture, analog, digital, verification, firmware, and customer support teams
  • Partner with product and program management to translate roadmap priorities into executable engineering plans
  • Define processes for milestone reviews, risk management, and decision-making that keep programs moving
  • Lead resolution of customer-critical issues from triage through root-cause analysis and corrective action
  • Develop engineering talent through coaching, performance management, hiring, and succession planning


The Impact You Will Have

  • Deliver production-quality Ethernet SerDes IP that enables customers to meet performance and time-to-market goals
  • Build execution discipline that consistently meets delivery commitments without burning out the team
  • Establish quality practices that reduce post-release issues and customer escalations
  • Develop future technical and managerial leaders through structured coaching
  • Drive methodology improvements and automation that measurably improve productivity
  • Shape the technical direction of next-generation SerDes platforms


What You'll Need

  • BS/MS/PhD in Electrical Engineering, Computer Engineering, or related discipline
  • 15+ years of semiconductor development experience with progression into engineering leadership
  • Proven experience leading engineering teams with significant schedule, quality, and customer impact
  • Strong understanding of SerDes PHY digital development flows including architecture, RTL, verification, firmware, integration, and release
  • Experience with Ethernet, PCIe/CXL, or other high-speed protocols; Ethernet SerDes experience strongly preferred
  • Track record managing execution across distributed teams and multiple stakeholders


Who You Are

  • You can walk into a program review, hear five opinions on why a milestone is at risk, and synthesize the real issue in under ten minutes
  • When a customer escalation lands, you get into the details and own the communication until it is resolved
  • You know the difference between process that helps and process that slows people down, and you kill the latter
  • Building teams is the technical work; you spend real time on hiring, coaching, and creating growth paths
  • You have strong opinions but listen first and change your mind when the data says you should


Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Frequently asked questions

What skills are required for Director R&D Engineering, Interface PHY / Ethernet SerDes at Synopsys?

The required skills for Director R&D Engineering, Interface PHY / Ethernet SerDes at Synopsys include: Ethernet, PCIe, Electrical Engineering.

What is the seniority level for Director R&D Engineering, Interface PHY / Ethernet SerDes at Synopsys?

Director R&D Engineering, Interface PHY / Ethernet SerDes at Synopsys is a Director / Manager level position.

How do I apply for Director R&D Engineering, Interface PHY / Ethernet SerDes at Synopsys?

You can view the full description and apply for Director R&D Engineering, Interface PHY / Ethernet SerDes at Synopsys on EchoJobs: https://echojobs.io/job/synopsys-senior-director-r-d-engineering-interface-phy-ethernet-serdes-yhdrb.