Interface IP Application Engineer (Pre-sale)

Location: Shanghai, China

At Synopsys, we’re at the heart of the innovations that are changing the way we work and play. Autonomous vehicles. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

Synopsys is a leading provider of high-quality, silicon-proven semiconductor IP solutions for SoC designs. We offer the world’s broadest portfolio of silicon IP—logic libraries, embedded memories, interface IP, analog IP, security IP, embedded processors and subsystems. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk. 

As an IP pre-sales support AE (Application Engineer) you will provide expert technical support on SoC architecture to drive customer engagements of Synopsys IP (Intellectual Property) products to successful technical closure.

The ideal candidate for this position is a seasoned engineer that enjoys working with our customers to develop solutions for their ASIC/SoC designs using the Synopsys Interface IP portfolio. It is perfect for someone who has great interpersonal skills and is committed to the success of our customers.

General responsibilities include:

• Collaboration with the sales team to identify & understand our customers’ technical & business challenges
• Co-work with customers to develop ASIC/SoC micro-architecture, leveraging the broad Synopsys IP portfolio
• Enabling our customers on how the IP products meet their needs and helping them evaluate it (with support from other teams) relative to their requirements
• Influencing the IP product development roadmap by communicating customer needs to the product engineering teams

Requirements:

• BSEE with 8+ years of relevant experience, or MSEE with 5+ years of relevant experience in ASIC/SoC design
• Either of the following requirements for the applicants should be satisfied.
  • Design or integration experience with single or multiple high-speed interfaces, such as DDR/LPDDR, PCIe/CCIX/CXL, Serdes, MIPI(CSI/DSI/UFS), Ethernet, USB, HBM, XSR/UCIE/HBI die-to-die, HDMI/DP, etc.
  •  ASIC/SoC micro-architecture design including bus fabric, CPU/GPU, address mapping, and various high-speed interfaces, as mentioned above
• Familiarity with state-of-art SoC design implementation: 
  • RTL design and verification using Verilog or SystemVerilog
  • Synthesis and static timing analysis, physical design flow, testbench creation and simulation
• Strong technical communication skills in both Mandarin and English: 
  • Ability to understand and present complex technical requirements, problems, and solutions concisely in verbal and written communications
  • Ability to analyze, summarize and generate status updates from technical data
  • Ability to organize, conduct and co-ordinate meetings involving multiple teams internal and external

Synopsys is committed to fostering an environment that treats people with respect, honesty, and professionalism.