Director - ASIC Physical Design

Location: Bengaluru, India

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. 

We develop complex soft IP across the HPC Controller space. With the standards evolving fast, each iteration doubling in IO speed, we need to invent new architectures to support the throughput increases of each new generation. 

It is imperative that we release soft IP designs that are physically feasible. For this we run through real P&R projects for complex configurations and the design-implementation team iterate with the design team to drive improvements and ensure optimal customer experience while mapping our soft IP to ASIC technology

So physical DI feasibility needs to be part of production QA checks. 

You Are:

You are a seasoned leader with a proven track record in hardening complex designs ready for tape-out. You are extremely experienced in driving timing closure, power optimizations, hierarchical flows, floor planning, clock tree strategies etc with Synopsys tool flows such as Fusion Compiler. You are skilled in project management and engagement with R&D to drive design and structural improvements to enable physical success. You are experienced in customer support to support customers implementing designs to their chosen tech nodes. You communicate with influence, foster accountability, and adapt quickly to change. Your expertise empowers teams to deliver impactful results. 

What You’ll Be Doing

• Leading a team of DI engineering executing several P&R projects on our HPC controller library 
• Ultimately accountable for physical feasibility sign-off of our HPC controllers 
• Developing with your team physical user guides 
• Supporting customers in their floorplan development and P&R 
• Building and evolving the team structure to match the capacity needs to successfully sign-off physical feasibility across HPC controllers 
• Assertively providing directions to design teams on design improvements required 
• Development of physical user guides for each product vertical following common template 
• Develop flows and sign-off criteria across the configuration space 
• Interfacing with methodology and EDA tooling teams to drive flow and methodology improvements 

The Impact You Will Have:

• Ensure all soft IP releases are physically feasibly with acceptable run times.
• Improve the design readiness for DI targets.
• Improve our customer experience around P&R of our soft IP.
• Ensure that our delivered constraints are of high quality.
• Foster a culture of collaboration between design and design-implementation teams. 
• Improving productivity across our development flows. 
• Build a culture of accountability and teamwork.
• Provide actionable insights for leadership decisions.

What You’ll Need:

• 10+ years in leadership roles.
• 15+ years in P&R roles. 
• Proven operational and project management experience.
• Outstanding communication and presentation skills.
• Strong analytical and problem-solving abilities.
• Background in ASIC development.

Who You Are:

• Strategic, proactive, and adaptable.
• Collaborative and ethical.
• Resilient and results oriented.

The Team You’ll Be A Part Of:

    You’ll work with a high-impact High-Performance-Compute leadership team focused on delivery of complex IP to the marketplace. You will lead a horizontal team across the HPC product verticals, with resources reporting to you inserted into each of these verticals. 

Rewards and Benefits:

   We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Your recruiter will provide more details about salary and benefits during the hiring process.