DFT, Staff Engineer in HCMC/ Hanoi

Location: Hanoi, Viet Nam

Alternate Job Titles:

• Staff ASIC Digital Design Engineer
• Staff DFT Engineer
• Staff SoC Testability Engineer

We Are:

At Synopsys, we drive innovations that shape the way we live and connect. From smart cars to AI, our technology leads chip design and verification worldwide. Join us to transform the future through continuous innovation.

You Are:

You are a proactive engineer with 5+ years of DFT experience, strong communication skills, and a drive for technical excellence. You enjoy teamwork, learning, and solving complex challenges in digital design.

What You’ll Be Doing:

• Define and implement DFT architecture for IP designs
• Perform SCAN insertion and ATPG simulation
• Analyze and improve test coverage
• Develop STA DFT timing constraints
• Prepare DFT integration guidelines for SoC
• Conduct quality checks and FMEDA/DFMEA analysis

The Impact You Will Have:

• Enhance product reliability and quality
• Support functional safety standards (ISO26262, FUSA)
• Streamline SoC integration
• Reduce debug cycles and time-to-market
• Mentor peers
• Drive innovation in test methodology

What You’ll Need:

• BS/MS/PhD in Electronics or related field
• 5+ years DFT design experience
• Expertise in Scan insertion, ATPG, JTAG
• Experience with Synopsys tools (Design Compiler, VCS, TetraMAX)
• Scripting (Perl, TCL, Python) is a plus

Who You Are:

• Responsible and collaborative
• Excellent English communication
• Team player and problem solver

The Team You’ll Be A Part Of:

Join a skilled, diverse engineering team in Da Nang focused on advancing DFT methodologies and supporting global innovation.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will provide more details during the hiring process.