DDR Design Verification, Principal Engineer

Location: Hsinchu, Taiwan

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a highly experienced engineering professional with a passion for verification excellence and a drive to stay at the forefront of DDR technology. With more than 15 years in UVM-based verification methodology, you thrive in complex, dynamic environments where innovation and precision are paramount. Your expertise spans DDR5, LPDDR6, and a broad spectrum of advanced digital protocols including AXI, CHI, CRYPTO, and RAS. You are deeply knowledgeable in formal verification and assertions, and you bring a practical understanding of scripting languages such as Shell, Perl, Python, and TCL.

You are a proactive problem solver, known for your analytical skills and meticulous attention to detail. Collaboration energizes you, and you excel at mentoring junior engineers, fostering a culture of growth and technical excellence. Communication is your strength, enabling you to bridge diverse teams and effectively support customers. You are fluent in English—both written and spoken—and appreciate the value of inclusion and diversity in driving innovation. Your ability to adapt to rapidly changing technologies and take ownership of challenging projects makes you an invaluable asset to any high-tech team. Above all, your commitment to quality and your positive attitude set you apart as a leader and role model in engineering.

What You’ll Be Doing:

• Leading verification of next-generation DDR controller IP, driving quality and innovation.
• Studying and interpreting JEDEC standard specifications to ensure compliance and performance.
• Designing, planning, and implementing UVM methodology-based verification platforms.
• Defining verification specifications and infrastructure, analyzing and debugging regression failures, and achieving comprehensive functional coverage.
• Collaborating closely with design teams to debug and resolve RTL and architectural issues.
• Partnering with VIP teams to address VIP-related challenges and ensure seamless integration.
• Mentoring junior engineers, sharing technical expertise, and fostering a collaborative team culture.
• Engaging with cross-functional groups and supporting customer teams through effective communication and technical leadership.

The Impact You Will Have:

• Accelerating delivery of high-quality DDR controller IPs for cutting-edge applications.
• Ensuring world-class functional verification and compliance with industry standards.
• Driving adoption of best practices in verification, enhancing reliability and performance.
• Reducing time-to-market for high-performance silicon solutions.
• Upholding Synopsys’ reputation for technical excellence and customer satisfaction.
• Empowering teams to innovate and solve complex engineering challenges.
• Contributing to the success of global technology leaders through your expertise.

What You’ll Need:

• MSEE or higher, with a minimum of 15 years’ experience in UVM-based verification methodology.
• Deep understanding of DDR technologies (DDR5, LPDDR6) and JEDEC standards.
• Expertise in assertions; formal verification experience is a plus.
• Working knowledge of AXI, CHI, CRYPTO, and RAS protocols.
• Proficiency in scripting languages: Shell, Perl, Python, TCL.
• Fluency in English, both verbal and written.

Who You Are:

• Self-motivated and proactive, with a strong sense of ownership.
• Exceptional analytical and problem-solving skills.
• Effective communicator, able to collaborate across teams and support customers.
• Inclusive team player and supportive mentor.
• Adaptable, open to learning, and comfortable navigating new technologies.
• Committed to quality, innovation, and continuous improvement.

The Team You’ll Be A Part Of:

You’ll join a global, high-performing team of digital engineers, driving the development and verification of industry-leading DDR controller IP. The team thrives on collaboration, technical depth, and tackling challenging projects that set new benchmarks in silicon design and verification. You’ll work alongside experts passionate about pushing the boundaries of technology and delivering solutions that power the world’s most advanced computing systems.