IC Package Design Engineer (Silicon Engineering)

IC PACKAGE DESIGN ENGINEER (SILICON ENGINEERING)

Would you like to become part of team developing silicon for Starlink's low earth orbit satellites that deliver broadband connectivity to the people who either do not have access to internet or have inconsistent connectivity? Come join the team working on multiple silicon projects that are driving more integration, lower power, mixed signal architectures and advanced silicon technology for deployment in space and ground infrastructures.

As an IC Package Design Engineer, you will be an integral part of the IC design team and lead packaging for custom in-house RFICs supporting digital beam formers and modems. 

RESPONSIBILITIES:

• Own and drive advanced package selection, new product BGA configuration and package structure
• Responsible for package/SIP layout, optimization, design verification and tapeout
• Interface and coordinate with cross-functional groups throughout SpaceX on new product package selection, feasibility analysis and design
• Work cross-functionally, understand trade-offs, constraints, and optimizing silicon floor plan, bump and package pin out
• Simulate and optimize signal/power integrity and RF performance of the package design
• Drive methodology, innovations, and productivity improvements in package design
• Interface and work with OSATs and vendors for the sourcing existing designs and future product development

BASIC QUALIFICATIONS:

• Bachelor's degree in electrical engineering or physics
• 1+ years hands on experience with IC package design experience

PREFERRED SKILLS AND EXPERIENCE:

• Thorough understanding of signal and power integrity fundamentals
• Substrate design experience for RF, digital, high-speed and mixed signal die
• Experience with Cadence APD+/SIP design tools
• Experience in package design electrical review, SI/PI analysis
• Fluent in SI/PI and EM simulation tools such as SIWave, HFSS, ADS
• Experience in package design for manufacturing reviews
• Familiar with BGA package substrate technologies
• Problem solver with strong engineering fundamentals

COMPENSATION & BENEFITS:    

Pay range:    

IC Package Design Engineer/Level I: $120,000.00 - $145,000.00/per year    
IC Package Design Engineer/Level II: $140,000.00 - $170,000.00/per year    

Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.

Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock, stock options, or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation & will be eligible for 10 or more paid holidays per year. Exempt employees are eligible for 5 days of sick leave per year.