Senior Principal Storage Architecture Engineer

Location: Rancho Cordova, us

Company Description

Join a multibillion-dollar global company that brings together amazing technology, people, and operational scale to become a powerhouse in the memory industry. Headquartered in Rancho Cordova, California, Solidigm combines elements of an established, successful technology company with the spirit, agility, and entrepreneurial mindset of a start-up. In addition to the U.S. headquarters and other facilities in the U.S., the company has international presence in Asia, Europe, and the Americas. Solidigm will continue to lead the world in innovating new Memory technologies with aspirations to be the #1 NAND memory company in the world. At Solidigm, we view problems as opportunities to define innovative solutions that hold the power to change the world and unleash the potential technological needs that the future holds. At Solidigm, we are One Team that fosters a diverse, equitable, and inclusive culture that embraces individual uniqueness and empowers us to bring our best selves to deliver excellence in support of Solidigm's vision and mission to be the go-to partner for optimized data storage solutions. You can be part of the takeoff of an innovative business that develops cutting-edge products, delivers strong business value for customers, provides an engaging workplace for its employees, and serves a greater impact on the world. This is a golden opportunity for the right applicant to join us and help design, build, and lead Solidigm. We want a diverse team of dedicated professionals who will not just be Solidigm team members but contribute to how we shape the future of the organization. We are seeking applicants who will grow and thrive in our culture; be customer inspired, trusting, innovative, team-oriented, inclusive, results driven, collaborative, passionate, and flexible.

Job Description

We are seeking a Senior Principal Engineer focused on Storage Architecture to lead performance definition, analysis, and optimization across our next-generation Solid-State Drive (SSD) and System-on-Chip (SoC) platforms. This role will define and drive the architectural interface between SoC hardware, firmware, and NAND subsystems to deliver world-class storage performance across client, enterprise, and hyperscale markets. As a key technical leader in the SSD Architecture organization, you will collaborate with cross-functional teams— SoC, firmware, NAND technology, system validation, and product engineering — to innovate in the areas of latency, QoS, throughput, and power efficiency.

Key Responsibilities

• Architect and model SoC-to-FW interface to optimize data paths, command handling, and quality-of-service mechanisms.
• Define performance targets and metrics for new SSD product lines and SoC platforms.
• Develop and refine system-level performance models (simulation and analytical) to predict SSD behavior under real-world workloads.
• Analyze firmware execution pipelines and hardware offload opportunities to improve latency, IOPS, and efficiency.
• Lead bottleneck analysis and performance triage across hardware, firmware, and NAND media layers.
• Partner with SoC design teams to define DMA, interrupt, queue, and cache architectures supporting high-performance I/O.
• Collaborate with FW teams to define command flows, queue management, and scheduling algorithms aligned with architectural intent.
• Drive performance validation methodologies, tools, and correlation between simulation and silicon.
• Evaluate emerging interface technologies (PCIe/NVMe, CXL, UCIe) and their impact on future architecture.
• Provide technical mentorship and thought leadership within the broader R&D and product development organization.

Qualifications

Required:

• M.S. or Ph.D. in Electrical Engineering, Computer Engineering, or related field (or equivalent experience).
• 10+ years of experience in SSD, SoC, or storage system architecture, with proven leadership in performance design and analysis.
• Deep understanding of SoC microarchitecture, including CPU subsystems, DMA, cache hierarchy, memory controllers, and QoS mechanisms.   Experience with ARM cores or alternatives (RISC V) preferred.
• Expertise in SSD firmware and hardware interactions, command processing pipelines, and NAND flash translation layers.
• Strong proficiency in performance modeling, profiling, and analysis tools.
• Solid knowledge of PCIe/NVMe protocol stack and host-storage interface behavior.
• Demonstrated experience identifying and resolving system-level bottlenecks across SoC and firmware layers.

Preferred:

• Experience with CXL, UCIe, or chiplet-based storage architectures.
• Familiarity with machine learning–based performance prediction or workload characterization.
• Hands-on experience in SoC simulation environments (SystemC, gem5, or equivalent).
• Proven ability to lead cross-functional technical efforts and communicate effectively with executives and engineering teams.

Personal Attributes

• Strategic thinker with strong analytical and systems-level reasoning skills.
• Comfortable working in ambiguity and driving clarity across complex technical domains.
• Passionate about innovation and performance leadership in storage technology.
• Excellent communicator and collaborator across global, multi-disciplinary teams.

Additional Information

The compensation range for this role is $211,730 - $[339,050. Actual compensation is influenced by a variety of factors including but not limited to skills, experience, qualifications, and geographic location.

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