Hardware RTL Tools and Verification Engineer (GB)

Signaloid provides a computing platform that tracks data uncertainties dynamically and throughout computations in execution workloads. Our computing platform uses deterministic computations on in-processor representations of probability distributions, to enable orders of magnitude speedup and lower implementation cost for computing tasks traditionally solved using Monte Carlo methods. The platform is available as a cloud-based computing engine that lets you run tasks via a cloud-based task execution API. We also provide on-premises and edge-hardware implementations of our computing platform for customers who want to use their existing on-site infrastructure and for use cases requiring operation without connection to the cloud.

Our platform is the most cost-effective way to engineer uncertainty quantification applications and is also the fastest way to run uncertainty quantification tasks, for key use cases. Workloads ranging from options pricing and portfolio modeling in finance, to uncertainty quantification for materials modeling and photonics simulation in engineering, often run an order of magnitude or more faster, compared to Monte-Carlo-based implementations running on high-end AWS EC2 instances.

Our team consists of contrarian engineers with combined research, engineering, and leadership experience from Apple, ARM, Bell Labs, CMU, University of Cambridge, IBM Research, MIT, NEC Labs, and University of Oxford. Find out more and try out the Signaloid uncertainty-tracking computing platform by signing up for free for our developer platform, at https://get.signaloid.io.

Role Description

Within the first year in this role, you will:

• Be responsible for implementing and setting up continuous integration and continuous deployment (CI/CD) and testing, for hardware design tools as well as for verification of hardware designs.
• Integrate hardware prototypes with GitHub's self-hosted runners for CI/CD.
• Maintain the hardware lab within which hardware prototypes used in the CI/CD infrastructure are hosted.
• Be responsible for maintaining the suite of hardware design tools used across development, verification, and production deployment.
• Be responsible for maintaining the tools for functional emulation of the microarchitecture of Signaloid's processor platforms and integrating those tools with hardware prototypes.

After a year in this role, you will have the opportunity to:

• Lead new architectural design work for deployment of continuous integration across Signaloid's compute architectures.
• Lead the implementation of your own deployment architectural ideas in collaboration with a larger team.
• Contribute to the strategic direction of Signaloid's computing platforms.
• Expand your role to encompass other areas in which you have demonstrated exceptional competence.

• At least three years experience with Verilog RTL.
• Three or more years experience writing low-level C/C++.
• Experience with commercial FPGA development tools as well as with open-source FPGA development tools.
• Strong background in FPGA-based design, simulation, testbench construction, etc.
• Strong background and understanding of Unix.
• Strong background in computer networking and system administration.
• Experience with multiple Linux and BSD distributions.
• Experience building customized OS distributions, applying kernel patches, and creating custom system builds for embedded hardware platforms.
• An ability to communicate complex engineering ideas succinctly and clearly.
• Honesty, empathy, and a willingness to see the world from the viewpoint of others.
  

Additional Desirable Attributes, Skills, and Experience:

• Familiarity with Python and Go.
• Familiarity with cocotb.
• Familiarity with cross-compilation toolchains, LLVM, and RISC-V architecture.
• Good understanding of digital arithmetic and number formats used in modern computing systems.
• Applied mathematics or physics background.

Our Recruiting Procedure

• All positions require you to write a brief cover letter that should be no more than one page long. The more concise the better. You can also substitute the cover letter for a snippet of code that will run on the signaloid.io platform; be creative! We use the cover letter / code snippet to screen for communication skills, as clear communication is essential in a remote working environment.
• Applicants who pass the cover letter screening receive an initial 15-minute Zoom screening call with the CEO/CTO.
• Applicants who pass the screening interview will be given a coding project that can be solved using the Free Tier of Signaloid's Signaloid Cloud Developer Platform. We will also provide you with additional free credits on the Signaloid Cloud Developer Platform. The coding exercise will be simple enough to complete in a few hours. You will however have a time window of one week or two weeks (your choice) to complete the coding exercise. You are encouraged to make your implementation open source on GitHub.
• Applicants who successfully complete the coding exercise are invited for a set of interviews with people from our core teams (there will be up to six interviewers). The interviewers will use the project you completed as a discussion point.
• In the final stage, applicants are invited for an on-site (or "virtual on-site") day with members of the team you are interviewing to join. During this day, we will work with you on a hands-on simulation of a real working day solving a task relevant to the position you are applying for, working with your potential future colleagues.