System IP Design Verification Engineer (Staff-SCI)

Position Summary

Role and Responsibilities

As a System IP Design Verification Engineer you will contribute to the functional verification of System IP including coherent interconnect and caches. This is an individual contributor role with heavily involved hands-on project execution. A strong background in Design Verification is required to be successful in this role.

• You own key features and timely execution of tasks as per milestones
• You create test plans as per spec and present to various stakeholders
• You propose and drive best practices/methodologies/automation that can improve productivity
• You work with designers to resolve any spec issues
• You create test benches, verification environments, stimulus, and tests
• You collaborate with designers to verify the correctness of a design feature and resolve fails
• You develop assertions, checkers, covergroups, and System Verilog constraints
• You analyze and debug, root causing functional fails from regressions
• You analyze code and functional coverage results, performing gap analysis
• You identify coverage exclusions and improving stimulus
• You work with SoC team to debug functional fails during IP bringup and feature execution
• You work well independently and as a team player

Skills and Qualifications

• 10+ years of experience with a Bachelor’s degree in Computer Science/Computer Engineering/relevant technical field, or 8+ years of experience with a Master’s degree, or 6+ years of experience with a PhD
• 8+ years industry experience in a Design Verification role
• Expert hands-on coding skills in Testbench, Stimulus, checker development & coverage closure
• Experience with System Verilog, UVM or equivalent
• Experience with Git version control
• Knowledge of ARM protocols or equivalent protocols – CHI, AXI, ACElite, APB
• Proficient in Unix/Perl/Python scripting
• Good written and verbal communication skills

Our Team

Our System IP team develops proprietary coherent interconnect and memory controller deployed in many high-volume products. Our team plays a key role in influencing the product roadmap for a market-leading system IP solutions. We focus on delivering system modeling capability based on optimization and use-case-driven analysis (gaming, computational photography) that enables a world-class memory subsystem.

With architecture scalability at the frontier of our design focus, our performance- and power-optimized IP solution gets integrated into complex semiconductor products, aiming to reach multiple market segments.

Being part of a new team of talented individuals with vastly diverse backgrounds and skill sets at a well-established global company means you have limitless room to explore, innovate, and expand role responsibilities to build technical expertise. With a big charter ahead, we get to do challenging work and solve unique problems in a highly collaborative and supportive environment. You will always be learning while helping us shape the team’s culture.

Total Rewards

At Samsung – SARC/ACL, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $144,345 and $257,336. Your actual base pay will depend on variables that may include your education skills, qualifications, experience, and work location.

Samsung employees have access to benefits including: medical, dental, vision, life insurance, 401(k), free onsite lunch, employee purchase program, tuition assistance (after 6 months), paid time off, student loan program, wellness incentives, and many more. In addition, regular full-time employees (salaried or hourly) are eligible for MBO bonus compensation, based on company, division, and individual performance.

Additionally, this role might be eligible to participate in long term incentive plan and relocation.

U.S. Export Control

This position requires the ability to access information subject to U.S. export control restrictions.  Applicants must have the ability to access export-controlled information or be eligible to receive a government authorization to access export-controlled information.

Trade Secrets

By submitting an application, you [applicant] agree[s] not to disclose to Samsung, or induce Samsung to use, any confidential or proprietary information (including trade secrets) belonging to any current or previous employer or other person or entity.

#SARC #ACL #Hybrid

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