Verification Engineer Onsite

Location: Santa Clara, CA, us

Company Description

Rootshell has over 12 years of experience in Infrastructure Management Services and over 5 years of experience in providing contingent workforce management services to our clients across India with a highly effective process for recruiting, screening, testing and consultant management. Many of our clients regularly seek our advice when making changes to their internal IT staffing and vendor management programs. Over the years, we have formulated strategies, process and in-house IT Systems - enabling our sourcing engine to mature into one of the strongest providers in the country.

Job Description

We need 2 on site USA, 20 Engineers in India/Korea. Out of 20 - 5 should be Lead Engineers where they are willing to go Korea, on site (we will take care of Visa from India) - 15 will be working from India.
This is for ASIC/SOC Verification Engineers
Must to have skills:

Minimum 5 yeas experiance as Veification Engineer
System Verilog, UVM or OVM methodologies block level verification atleast 2 years.
Additional skill and not mandatory
SVA (systemverilog assertions), modem baseband verification experience, AHB, AXI or memory controller, arm based assembly testings, arm performance or bus performance

Qualifications

A successful DV candidate will be detail oriented with solid analytic and debugging skills, strong knowledge of digital design, good understanding of Object Oriented Programming (OOP) concepts and fine written and verbal communication skills.
Experience in Hardware verification languages (HVL) such as SystemVerilog testbench (OVM/UVM) and such as Verilog, SystemVerilog and VHDL is preferred.
SOC Design Verification (ARM, AMBA, AHB, AXI, Peripherals, clock, security)
Modem Design Verification (LTE, WCDMA, UMTS, CDMA,DSP or data path verification
Low-Power Design Verification
Tools used are : Verdi , VCS, IUS

Additional Information

Certification would be given preference