Staff Power Electronics Engineer, Energy Storage

Location: San Francisco, California, United States

Department: Engineering & Technology

Position Summary: 

The Power Electronics Engineer, Energy Storage designs and develops power conversion systems for Redwood's next-generation Battery Energy Storage Systems (BESS), including converters that interface with battery packs, battery modules, photovoltaic systems, and the grid for utility-scale and data center applications. This is a fully on-site role at 100 Hooper, San Francisco. The engineer independently owns complex circuit- and system-level problems spanning converter topology selection, power-stage component selection, magnetics design, PCB/PCBA layout, thermal analysis, and validation, adapting existing approaches and precedent to new and unusual design challenges. The role partners extensively with Mechanical, Firmware/Controls, Systems, Compliance, Supply Chain, and Manufacturing teams to take designs from concept through production. Success depends on sound engineering judgment, hands-on lab validation skills, and the ability to resolve ambiguous technical trade-offs with limited direction. 

Essential Duties and Responsibilities 

• Design high-voltage (800V – 25kVdc, 480–800Vac) and high-power (10kW–500kW) converters tailored for utility-scale BESS and industrial infrastructure. 
• Conduct comprehensive topology comparison and trade-off analyses evaluating efficiency, power density, cost, and manufacturability. 
• Perform power-stage component sizing and Si/SiC MOSFET selection based on loss modeling and thermal management. 
• Design robust gate driver circuits and dedicated gate driver power supplies to ensure safe, high-frequency switching operations. 
• Lead the design, modeling, and specification of custom magnetic components, including transformers and inductors utilizing Litz-wire or PCB-winding architectures. 
• Architect the low-voltage (LV) subsystem, including auxiliary power supplies, sensing circuitry (voltage/current/temperature), and hardware-level protection. 
• Design and optimize EMI filters, including differential-mode and common-mode inductors, X/Y-caps, and damping elements. 
• Drive high-voltage, high-power PCB/PCBA layout design, ensuring clearance/creepage rules and signal integrity under high-noise environments.
• Collaborate with cross-functional teams (Mechanical, Controls/Firmware, Supply Chain, Manufacturing, Compliance) to define requirements, test specifications, and achieve industry certifications 

Skills, Knowledge, and Abilities

• MS or PhD in Electrical Engineering, with a focus on power electronics.
• 5-7 years of experience in electrical engineering, with a strong focus on power conversion or energy storage products, ideally for mass production.
• Hands-on experience in high-voltage (up to 1.5kVdc and 800Vac) hardware design. Experience in high voltage (up to 25kVdc, 34.5kVac) for SST is a plus.
• Experience with power semiconductor selection, gate drive design, and hardware protection circuits.
• Deep understanding of power electronics topologies and fundamentals (AC/DC, DC/DC).
• Proficiency with circuit simulation, FEA simulation, and CAD tools (e.g., Simulink, LTspice, Ansys Maxwell/Q3D, Altium Designer).
• Demonstrated ability to perform detailed layout of high-power, noise-sensitive PCBs in Altium or equivalent CAD software.
• Proficiency with lab equipment, including oscilloscopes, impedance analyzers, network analyzers, and signal generators.
• Excellent written and verbal communication skills, with the ability to effectively collaborate across diverse cross-functional teams. 
• Foundational knowledge of control theory and embedded systems.
• Strong analytical and systematic problem-solving skills.
• Proven track record of rapid prototyping and hardware iterations based on cross-functional and supplier feedback. 
• Strong ability to select circuit components considering both electrical performance and manufacturability (DFM).
• Experience mentoring test technicians to execute design verification, interpret test data, and define component maturity criteria.