Memory Yield Engineer, Staff

Location: Hsinchu City, Hsinchu City, Taiwan

Department: ASICS Engineering

Work Location: onsite

Company:

Qualcomm Semiconductor Limited

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

Qualcomm is seeking a skilled and proactive Memory Yield Analysis & Improvement Engineer to drive yield optimization for advanced 3D SOC + memory products. This role serves as a critical engineering interface between Qualcomm and memory suppliers, ensuring product requirements are met through rigorous memory test, yield analysis, process monitoring, and collaborative problem-solving.

Key Responsibilities

• Yield Monitoring & Analysis
  • Track fab in-line/WAT measurement data to ensure process stability and compliance with specifications.
  • Perform statistical wafer/package-level test data analysis, applying memory repair schemes and correlating fab in-line/WAT data.
• Failure Analysis & Corrective Action
  • Conduct root cause analysis using fab process history and test results.
  • Drive corrective actions across fab process, wafer test, package test, and design levels to address yield loss.
  • Support failure analysis during SOC + memory system-level characterization and reliability qualification tests.
• Cross-Functional Collaboration
  • Work closely with fab process teams, test teams, and design engineers from both Qualcomm and memory suppliers.
  • Coordinate test flow/hardware setup and ensure smooth integration across teams.
• Production Yield Improvement
  • Lead yield optimization efforts post-qualification through fab process/test tuning.
  • Support failure analysis for customer return samples.

Required Skills & Experience

• Minimum 7 years in DRAM test and wafer yield analysis and improvement engineering.
• Strong knowledge of DRAM test, processes, fab defect control, in-line/WAT/AC/DC measurement data analysis, and failure analysis.
• Experience in DRAM product qualification and repair schemes for yield improvement.
• Ability to define test coverage, fab process monitoring specs and wafer/package level test conditions for mature yield achievement.
• Familiarity with DRAM package-level test and yield improvement, memory process integration, basic device physics, design verification, and test patterns.
• Bonus Skills:
  • DRAM product engineer experience
  • Flash memory yield improvement experience.
  • Broader knowledge in device physics, design, 3D wafer bonding, and test flow optimization to minimize memory fail in field.

Education Requirements

• Min Bachelor’s degree in Electrical Engineering (or equivalent engineering) required.
• Master’s or PhD in Electrical Engineering preferred.

Additional Requirements

• Strong multitasking ability and proactive leadership in supplier engagement.
• Excellent written and verbal communication skills in English.
• Strong interpersonal skills for effective teamwork.
• Willingness to travel occasionally to supplier sites.
• Commitment to continuous learning in new memory engineering domains.

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [email protected] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

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