ASIC RTL Design Engineer (Camera)-Sr Lead

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.3-5years of relevant ASIC design experience

• Solid experience in digital front end design for ASICs

• Expertise in RTL coding in Verilog/VHDL/SV of complex designs with multiple clock domains

• Expertise with various bus protocols like AHB, AXI and NOC designs

• Experience in low power design methodology and clock domain crossing designs

• Experience in Spyglass Lint/CDC checks and waiver creation

• Experience in formal verification with Cadence LEC

• Understanding of full RTL to GDS flow to interact with DFT and PD teams

• Experience in mobile Multimedia/Camera design is a plus

• DSP /ISP knowledge is a plus.

• Working knowledge of timing closure is a plus

• Expertise in Perl, TCL language is a plus

• Expertise in post-Si debug is a plus

• Good documentation skills

• Ability to create unit level test plan

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

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