Qualcomm logo

ASIC Design Verification Engineer

Qualcomm

On-site
Santa Clara, CA
Full-time
Mid Level
Senior
2+ yrs
$127k–$190kPosted 4w ago

Real job — pulled straight from Qualcomm’s careers page · Verified July 18, 2026 · No reposts.

Job description

Qualcomm is hiring a ASIC Design Verification Engineer — a full-time, based in Santa Clara, CA role ($127k–$190k). Apply directly on Qualcomm's careers page below.

ASIC Design Verification Engineer (Santa Clara, CA)

Location: Santa Clara, California, United States of America

Department: ASICS Engineering

Work Location: onsite


Company:

Qualcomm Technologies, Inc.

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in as an ASIC Design Verification Engineer

The team is responsible for the complete verification lifecycle, from system-level concept to tape out and post-silicon support. The responsibility of the position involves comprehensive pre-silicon test planning for digital power IP's, its testbench development using the advanced verification methodology such as SystemVerilog-UVM, coverage development, assertion model development and formal verification (property checking). Learn and deploy power-aware UPF verification flow and methodology. Involve in developing automation to improve verification efficiency.

Qualifications:

  • Minimum 3 years of DV experience using uvm/assertion based verification technologies
  • Experience in verifying complex SOC or SOC subsystems
  • Experience with caches and DDR memory protocol verification
  • Experience with using memory verification VIP's
  • Exposure to DDR phy
  • Exposure to firmware/driver development using c++
  • Exposure with multiple succesfull tapeouts from conception to post silicon debug
  • Exposure to Formal verification
  • Exposure to PASIM simulations
  • Exposure to perf and power verification.

 

Skill proficiency: UVM, system verilog, assertion, C++, python

Technology: DDR, CACHE, SOC

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.

EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

 

Pay range and Other Compensation & Benefits:

$126,700.00 - $190,100.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.

If you would like more information about this role, please contact Qualcomm Careers.

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Frequently asked questions

What is the salary for ASIC Design Verification Engineer at Qualcomm?

The estimated salary range for ASIC Design Verification Engineer at Qualcomm is $127,000 - $190,000 USD per year.

What skills are required for ASIC Design Verification Engineer at Qualcomm?

The required skills for ASIC Design Verification Engineer at Qualcomm include: SystemVerilog, C++, Python.

What is the seniority level for ASIC Design Verification Engineer at Qualcomm?

ASIC Design Verification Engineer at Qualcomm is a Mid Level / Senior level position.

How do I apply for ASIC Design Verification Engineer at Qualcomm?

You can view the full description and apply for ASIC Design Verification Engineer at Qualcomm on EchoJobs: https://echojobs.io/job/qualcomm-asic-design-verification-engineer-santa-clara-ca-iaf0j.