ASIC Design and Implementation Engineer – Compute DSP/AI Processors

Company:

Job Area:

General Summary:

Minimum Qualifications:

Principal Duties and Responsibilities

• Develop module, hard-macro, and floor planning specifications for digital compute processing cores, bus interfaces, and other system-on-a-chip functions
• Investigate, analyze, and present performance, area, power, and system cost tradeoffs for hard macros using constraint, timing, and floorplan driven optimizations
• Contribute to and drive design, floor planning, and implementation meetings within a multi-disciplinary team
• Implement and debug timing constraints, RTL, Design for Test (DFT), and clock functions
• Perform netlist synthesis, Formal Verification, and Static Timing Analysis of hard macros
• Implement ECOs using automated design flows
• Complete design checks and analysis such as: lint, CDC, power intent, and static timing reports
• Develop methodology and automation for design/synthesis using tcl/make/python scripts

Minimum Qualifications

• 3+ years ASIC design and netlist implementation
• Authorization to work legally in Canada

Preferred Qualifications

• Proven experience implementing high speed logic designs with RAM and several clock domains
• Strong verbal and written communication skills to concisely evaluate and deliver specifications, plans, and design analyses
• Detail oriented with strong analytical, critical thinking, and debugging skills
• Collaborative and able to adapt to challenging team objectives in a multi-national organization
• Understanding of ASIC/VLSI design concepts
  • Bus interfaces (AHB/AXI)
  • Clock crossing
  • RAM and FIFO integration
  • ASIC clock network analysis
  • Static timing analysis debug strategy
  • Timing constraints development and debug
  • Power optimization
• Proven design and implementation skills using several of the following languages and tools
  • Synthesis: DCG/NXT, Genus, IC Compiler,
  • Static Timing: Primetime
  • Power Intent and Analysis: UPF, CLP, PTPX, PowerPro
  • Formal Verification: Conformal, Formality
  • Design/DV: RTL, VCS, FC, Verdi, Questa, Xcelium, Spyglass
  • Scripting Languages: TCL, Python, Perl, UNIX shell

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