Analog Design Lead/Manager
Team: Engineering
Location: Hyderabad
Commitment: Full-time
Workplace Type: hybrid
Role and Responsibilities
- Roles and Responsibilities:
- Manage, hire, supervise and retain the analog team – for Chip Development
- Work with the IP engineering team to take the IP needed and make any customization needed for integration into the products being developed
- Evaluate and select the IP from third party vendors like PCIe, USB, JESD204C, MIPI, Ethernet PHY and integrate the IP into our chips
- Enable the analog engineers to develop necessary skills for the job
- Analyze functional and performance requirements and derive specifications
- Architect circuit solutions
- Perform schematic capture, simulation and key-element layout of cells, blocks, macros and entire devices
- Interface with other IC designers, package designers, characterization engineers, and operations to complete working designs, ensure testability, and validate finished silicon
- Work with Architect to set system level specifications
Qualifications and experience
- BSEE Required, MSEE Preferred
- Minimum 10 years in analog semiconductor industry
- Experience in leading a chip preferred
- EHF/mmWave design experience is a plus
- Design Experience with 22, 16, 12 and lower nodes
- Familiar with PAs, Modulators, LNAs, LOs, detectors, dividers, biasing
- Experience with one or two of high speed, high precision ADC design, Digital PLL, SerDes, VCO, PMU
- Experience with both frequency- and time-domain analysis and design techniques required
- Experience leading project teams and taping out complete products or test chips required
Expectations
- Make any (if needed customizations) to the internal and external Analog IP licensed for the chips we are going to develop.
- Evaluate the IP we have to license – like PCIe, LPDDR4, JESD 204C PHY
- Help develop any BIST
- DO the Full chip integration
- Help setup the AMS mixed signal full chip simulation environment
- Run a few of the simulations
- Help with the FC simulations debug
- Help close the timing issues if any come up and work with the PD person to resolve any SI issues.
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