Senior Analog Validation/Characterization Engineer

Location: San Jose (Holger Way)

Time Type: Full time

Job Description

We are looking for a mid-level Mixed-Signal Engineer to join our Automotive Semiconductor division. This role bridges the gap between pre-silicon design and post-silicon reality. You will spend roughly 50% of your time developing behavioral models to speed up chip simulation and 50% of your time in the lab performing hands-on validation of high-speed transceiver silicon.

Key Responsibilities

• AMS Modeling: Create and maintain behavioral models (SystemVerilog/RNM, Verilog-A) for mixed-signal blocks to support full-chip functional verification.

• Hardware Validation: Perform bench-top characterization of high-speed transceivers (10G+) using standard lab equipment (Oscilloscopes, VNAs, BERTs).

• Python Scripting: Develop and optimize Python scripts to automate lab measurements, parse large datasets, and generate validation reports.

• Simulation: Run mixed-signal co-simulations (Cadence Virtuoso/Spectre) to verify connectivity and basic functionality of analog-digital interfaces.

• Cross-Functional Support: Collaborate with Design and Verification teams to debug silicon issues and correlate lab results with simulation data.

Skills & Qualifications

• Education: BSEE or MSEE with 3+ years of experience in IC modeling, design, or validation.

• Simulation Tools: Experience with Cadence Virtuoso, Spectre, or similar mixed-signal simulation environments.

• Modeling Languages: Proficiency in SystemVerilog (Real Number Modeling preferred) or Verilog-A.

• Test & Measurement: Hands-on experience with high-speed lab equipment for signal integrity and performance testing.

• Software/Scripting: Strong Python skills for automation (knowledge of libraries like NumPy, Matplotlib, or PyVISA is a plus).

Preferred Qualifications

• Familiarity with high-speed serial standards (e.g., SerDes, Ethernet, or PCIe).

• Experience working within a structured Product Development Process (PDP) in a large-scale semiconductor environment.

• Understanding of basic signal integrity concepts (jitter, eye diagrams, insertion loss).

The base salary range for this position is as mentioned below per year. We also provide competitive benefits, incentive compensation, and/or equity for certain roles.
Company benefits include health. dental, and vision insurance. 401(k), and paid leave. Please note that the base salary range (OR hourly rate) is a guideline, and individual total compensation may vary based on a number of factors such as qualifications, skill level, work location, and other business and organizational needs. This base pay range is specific to California and is not applicable to other locations. A reasonable estimate of the base salary range as of the date of this posting is:

More information about NXP in the United States...

NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.