Real job — pulled straight from NVIDIA’s careers page · Verified August 7, 2026 · No reposts.
Job description
NVIDIA is hiring a Senior Static Timing Analysis Engineer, Sub-chip — a full-time, based in Yokneam, Israel role. Apply directly on NVIDIA's careers page below.
Senior STA Engineer, Sub-chip
Location: Israel, Yokneam, Israel, Beer Sheva, Israel, Tel Aviv
Time Type: Full time
Job Description
NVIDIA is looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you'll be doing:
Perform advanced Static Timing Analysis (STA) for HSIO at chiplet and FC level.
Running Prime Time, review and debug timing paths, understand constraints, sdc generation, timing ecos generation.
Identify convergence risks and work closely with physical design, RTL and DFT teams, ensuring convergence throughout various project stages.
Responsible for a full timing closer and quality approval from pre-layout STA model through signoff.
AI use for timing optimization and data analysis.
What we need to see:
B.SC./ M.SC. in Electrical Engineering.
At least 5+ years of hands-on STA experience.
Experience in Prime Time and signoff methodologies.
A great teammate who thrives in a collaborative environment.
AI tools orientation or alternatively a desire to learn.
Ways to stand out from the crowd:
Agentic Frameworks.
AI prompting experience.
Experience in Linux environments.
TCL, Python, shell scripting abilities.
Experience with data collection and analysis.
NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best physical design team in the industry!
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Frequently asked questions
What skills are required for Senior Static Timing Analysis Engineer, Sub-chip at NVIDIA?
The required skills for Senior Static Timing Analysis Engineer, Sub-chip at NVIDIA include: Python, Linux, AI.
What is the seniority level for Senior Static Timing Analysis Engineer, Sub-chip at NVIDIA?
Senior Static Timing Analysis Engineer, Sub-chip at NVIDIA is a Senior level position.
How do I apply for Senior Static Timing Analysis Engineer, Sub-chip at NVIDIA?
You can view the full description and apply for Senior Static Timing Analysis Engineer, Sub-chip at NVIDIA on EchoJobs: https://echojobs.io/job/nvidia-senior-sta-engineer-sub-chip-3nfdd.