Senior Mixed Signal Design Engineer

Location: US, CA, Santa Clara

Time Type: Full time

Job Description

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can take on, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Make the choice and join us today!

This is a diverse team working with innovative, ground breaking technology. If you are someone that loves a challenge, come join this complementary team and help move the needle! As a member of our Mixed Signal team, you will lead the design of CMOS high-speed interface circuits and mixed-signal circuits. Strong hands-on experience in the lab with silicon validation, debugging, characterization and bring up.

What you'll be doing:

• Lead design and implementation of high speed interface circuit

• Design projects include high speed transceivers and high frequency PLLs

• Design, simulation, and verification of mixed-signal circuits

• Supervise closely IC circuit/mask designers, provide floorplan and layout guidelines

• Support lab characterization of silicon

• Tackle challenges of circuit design in deep submicron CMOS

• Take designs through implementation and productization

• Work with multi-functional teams

What we need to see:

• MS in Electrical Engineering or equivalent experience

• 4+ years of design experience in CMOS analog / mixed-signal circuit Design

• Solid understanding of Cadence custom design tools, circuit simulator, timing analysis tool

• A great teammate with good interpersonal skills

• Proven experience in crafting and mentoring designers

• Extensive experience in Tx, Rx, CDR, PLL for high speed IO interfaces

• In-depth understanding of deep submicron CMOS process and related circuit design issues

• Experience in silicon bring-up, debugging and use of lab instrumentation is required

• Knowledge in system level timing budget, signal integrity, and power integrity is a plus

• Experience in Verilog, Matlab, Primetime, Nanotime

Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are:
196,000 USD – 310,500 USD for Level 5; and 232,000 USD – 368,000 USD for Level 6.Applications for this job will be accepted at least until November 3, 2026.

This posting is for an existing vacancy. 

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.