Senior Design Verification Engineer

Location: India, Bengaluru

Time Type: Full time

Job Description

NVIDIA is seeking a talented Senior Verification Engineer to join the Holoscan FPGA team, responsible for verifying next-generation FPGA-based solutions that accelerate real-time processing and connectivity for advanced healthcare, robotics, edge AI, and automotive systems. This role offers the opportunity to work on cutting-edge platforms within NVIDIA Holoscan, collaborating with world-class engineers to develop and validate technologies that power the future of intelligent machines and edge computing. If you strive for innovation and excellence, this is where you belong!

What you'll be doing:

• Responsible for verification of Holoscan Edge compute FPGA designs.

• Technical leadership role to define/plan/implement/execute verification strategy of complex design.

• Ability to delve into lowest level details of ASIC/FPGA design specification, implementation and it's system level impact.

• Collaborate closely with design and architecture teams to verify architectural and microarchitectural features

• Define/Create a scalable constrained-random verification environment using SystemVerilog and UVM methologies.

• Drive stimulus, comprehensive coverage strategy to show continuous progress towards product milestones.

• Analyze and improve existing verification strategies by incorporating AI accelerated workflows to enhance efficiency and effectiveness

What we need to see:

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent experience.

• At least 3+ years of experience in ASIC verification.

• Experience or knowledge with SystemVerilog, SVA or functional coverage.

• Excellent communication and teamwork abilities.

• Proficiency of script languages like Python or Perl.

• Strong understanding of verification methodologies and tools.

• Outstanding problem-solving skills and attention to detail.

Ways to stand out from the crowd:

• Prior experience in FPGA subsystem verification.

• Exposure to high speed protocols like MIPI, Ethernet, USB, PCIE.

• Experience with formal property checking tools such as Cadence (IEV), Jasper and Synopsys (Magellan / VC Formal).

We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status.

With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and passionate people in the world working for us and, due to unprecedented growth, our elite engineering teams are rapidly growing. If you're a creative and independent engineer with a real passion for technology, we want to hear from you.

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