
Real job — pulled straight from NVIDIA’s careers page · Verified August 7, 2026 · No reposts.
Job description
NVIDIA is hiring a ASIC Design Efficiency Engineer — a full-time, based in Santa Clara, CA role ($116k–$219k). Apply directly on NVIDIA's careers page below.
ASIC Design Efficiency Engineer
Location: US, CA, Santa Clara, US, TX, Austin, US, NC, Durham
Time Type: Full time
Job Description
We are now looking for an ASIC Design Efficiency Engineer! NVIDIA is seeking extraordinary methodology engineers to design hardware accelerators and processors on our next-generation mobile, embedded and datacenter platforms. This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. Join our dynamic team today!
What you'll be doing:
Develop innovative HW, GPU and system designs to extend the state of the art performance and efficiency.
Understand the design and implementation, develop methodology and infrastructure to drive Performance, Power and Area (PPA) improvements.
Execute and deliver fully verified, high performance, area and power efficient RTL to achieve design targets.
Collaborate with architects, designers, verification and VLSI teams to craft the industries' top performing GPUs.
What we need to see:
Bachelors Degree in EE or CE or equivalent experience.
2+ years of experience.
Proficiency in SystemVerilog or similar HDL.
You have a solid understanding of logic design and computer architecture.
Strong interpersonal skills are required along with the ability to work in a diverse product oriented team.
Ways to stand out from the crowd:
Pipeline processor or deep learning accelerator design/architecture experience
Performance verification, low power or physical (synthesis/VLSI) design experience
Scripting knowledge in Python/Perl
NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you!
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 116,000 USD - 189,750 USD for Level 2, and 136,000 USD - 218,500 USD for Level 3.You will also be eligible for equity and benefits.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.Get ASIC Design Efficiency Engineer jobs like this→
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Frequently asked questions
What is the salary for ASIC Design Efficiency Engineer at NVIDIA?
The estimated salary range for ASIC Design Efficiency Engineer at NVIDIA is $116,000 - $219,000 USD per year.
What skills are required for ASIC Design Efficiency Engineer at NVIDIA?
The required skills for ASIC Design Efficiency Engineer at NVIDIA include: SystemVerilog, Python, Perl, Deep Learning.
What is the seniority level for ASIC Design Efficiency Engineer at NVIDIA?
ASIC Design Efficiency Engineer at NVIDIA is a Mid Level / Senior level position.
How do I apply for ASIC Design Efficiency Engineer at NVIDIA?
You can view the full description and apply for ASIC Design Efficiency Engineer at NVIDIA on EchoJobs: https://echojobs.io/job/nvidia-asic-design-efficiency-engineer-2edmf.