Principal Validation Engineer

The Artificial Intelligence Silicon Engineering team is seeking a Principal Validation Engineer to deliver premium-quality designs once considered impossible. We are responsible for delivering cutting-edge AI designs that can perform complex and high-performance functions in an extremely efficient manner. 

We are looking for a Principal Validation Engineer with experience in one or more of the following validation domains : functional, electrical, high speed interfaces, memory, power/performance, debug/BU and tool development.

You will be part of the Post-Silicon Validation team in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC) Silicon Org.

Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.  

In alignment with our Microsoft values, we are committed to cultivating an inclusive work environment for all employees to positively impact our culture every day. 

Required Qualifications:

• 9+ years of related technical engineering experience
  • OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience or internship experience
  • OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience
  • OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience.
• Applied understanding of Computer Architecture and SoC validation principles, including:
  • Broad understanding of SoC subsystem, SoC system level, and platform level functionality
  • Writing scripts/software with industry standard languages such as Python or C/C++.
• Leadership experience driving Post-Silicon validation and characterization and successful execution.

Other Requirements:

• Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
• Citizenship verification: This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations.  As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.

Preferred Qualifications:

• Demonstrated success in running cross-disciplinary taskforces.
• Verification, logic design or validation experience as part of a Central Processing Unit(CPU), System on Chip(SoC) and/or Intellectual Property(IP) development team.
• Good Leadership skills.
• Experience with high-speed Input Output(IO) (ethernet, Peripheral Componenet Interconnect Express(PCIe)).
• Understanding of board level schematics.
• Understanding of system level software and firmware.
• Demonstrated success in hardware/software debug efforts.
• Effective communication, collaboration and teamwork skills and ability to lead, grow, and contribute to diverse and inclusive teams.
• Hands on experience debugging silicon failures using on chip debug features (like trace or Joint Test Action Group(JTAG)) as well as test equipment (like protocol analyzers, bit error rate testers, logic analyzers, high speed oscilloscopes).

Silicon Engineering IC5 - The typical base pay range for this role across the U.S. is USD $137,600 - $267,000 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $180,400 - $294,000 per year.

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here: https://careers.microsoft.com/us/en/us-corporate-pay   

Microsoft will accept applications for the role until January 19, 2025.

Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances.  We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request via the Accommodation request form.

Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.

• Develop validation strategy, requirements, environments, tools, and methodologies including debug board and hardware/software requirements.
• Apply your knowledge of validation principles and techniques and your judgement to write test plans and implement them by developing test content, scripts, tools, and other verification collateral.
• Execute content in post-silicon, triage, and debug failures.
• Apply your growth mindset to learn and adapt in a complex and dynamic environment.
• Engage with partners to drive continuous improvement to design, validation plans/collateral, and methodology to prevent, reduce, and/or find bugs sooner, more easily, or more reliably.
• Provide technical guidance, coaching, and mentorship to other engineers in your areas of experience.
• Collaborate with and influence architects, logic designers, verification engineers, other post-silicon validators, and IP and tool providers.
• Delight your customers by providing high quality results on schedule.
• Provide technical leadership with respect and integrity.
• Apply your experience towards pre-silicon verification plans, tests, and debug of your area.
• Other
  • Embody our Culture and Values