At Micron, we are undergoing a historic expansion with our new fabrication facility in Boise, ID. As a leader in the semiconductor industry, we build solutions that inspire and transform technology. With plans to invest more than $150 billion globally over the next decade in leading-edge manufacturing, we are looking for passionate people to join our Boise expansion team and contribute to the growth and innovation of the semiconductor industry.

As a Staff Yield Analysis Engineer at Micron, you will leverage advanced data analysis to identify, characterize, and quantify yield limiters. Through investigative work, you will pinpoint the root causes of yield issues and publish detailed yield pareto that guides improvement strategies. Beyond analysis, you will collaborate closely with Process Integration and Process Engineering teams to design and implement corrective actions—giving you a direct role in resolving yield challenges and driving continuous improvement across the fab.

Responsibilities:

• Identify and characterize new yield issues by tracking probe yields and trends, and explain gaps between target and actual yields.

• Perform advanced data analysis and characterization to quantify issues, generate an accurate yield pareto to guide the fab on issues limiting yield.

• Use statistical tools and data-mining techniques to identify root causes and opportunities for improvement.

• Work closely with the Failure Analysis (FA) team, including Electrical Failure Analysis (EFA) and Physical Failure Analysis (PFA), to correlate electrical signals with probe signatures and data-mining insights, delivering a comprehensive view to process teams for effective issue resolution.

• Partner with module and inline monitoring teams to ensure timely implementation and monitoring of yield fixes, providing clear handoffs and alignment to drive sustainable improvements.

• Suggest new ideas and collaborate with the global network to develop best known methods and maintain alignment between sites

• Apply semiconductor process knowledge, defect inspection, metrology, and process control fundamentals.

Minimum Qualifications:

• Master's degree in Computer Science or related technical field. 6 + years of semiconductor experience.

• 10+  years experience in semiconductor physics and understanding of transistor operations, scaling limitations and reliability; basic knowledge of CMOS circuits and characterization methods.

• Deep experience using at least one software (JMP, Python…etc)

• Experience in multi-functional programs across several groups that has been adopted.

• Ability to influence a BKM and implement solution across the network.

Preferred Qualifications:

• DRAM experience

• 5+ years of experience as Yield Analysis engineer or RDA in a MFG/HVM environment.