Technical Staff Engineer-Analog Design

Location: AZ - Chandler

Time Type: Full time

Job Description

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.

Visit our careers page to see what exciting opportunities and company perks await!

Job Description:

The dsPIC BU is seeking an experienced analog design technical lead with a strong background in analog and mixed signal CMOS IC design. This position has the responsibility of both hands-on IP design and mentorship.

Job Responsibilities include:

• design CMOS analog circuits for dsPIC microcontroller chips: ADCs, power management IPs (Bandgap voltage reference, LDO, Buck), opamps, oscillators, plls, etc.
• perform design reviews, silicon validation and debug.
• review layout with strong understanding of floor planning, sensitive signals routings, parasitic effects, IO ESD & Latchup, and silicon reliability.
• mentor and guide junior designers
• work with SOC, architecture, application, product & test, foundry and CAD engineering teams

Requirements/Qualifications:

• Bachelor's degree in Electrical Engineering and 12.5+ years of relevant experience including at least 10 years of CMOS design experience
• Must have extensive Cadence design tool experience
• Experience with hand-on silicon testing and debugging
• Strong ADC design experience preferred

Travel Time:

0% - 25%

Physical Attributes:

Hearing, Seeing, Talking, Works Alone, Works Around Others

Physical Requirements:

sitting 90%

Pay Range:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below:

Benefits of working at Microchip

The annual base salary range for this position, which could be performed in the US, is $91,000 - $232,000.*

Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.

For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.

To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.