Senior Technical Staff Engineer-SOC Lead (Design & Architecture)

Location: AZ - Chandler

Time Type: Full time

Job Description

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.

Visit our careers page to see what exciting opportunities and company perks await!

Job Description:

The Wireless Solutions Group is seeking for an experienced Engineer to lead our portfolio of 32-bit microcontroller-based Bluetooth and Wi-Fi products. In this position, you will drive next-generation Wireless SOC solutions that combine high-performance and low-power requirements. You will provide technical leadership and collaborate closely with teams across different functions – such as architecture, RTL design, verification, and implementation teams. A successful candidate requires strong collaboration across sites and functions, excellent communication, and the ability to excel in a fast-moving and dynamic environment.

Key Responsibilities

• Contribute to SOC design from concept through tape-out by partnering with the Architecture, RTL design, and implementation teams.
• Create detailed microarchitectural specifications that clearly represent design objectives, technical requirements and proposed solutions.
• Drive SOC designs based on microarchitecture specifications and design documentation; support verification plans to ensure IC qualification meets required standards.
• Work closely with software, analog, post-silicon validation, and test teams to optimize development cycle times.
• Collaborate with marketing, architecture, and applications teams to define next-generation low-power wireless products.
• Implement AI-driven and automation techniques to enhance design quality, methodologies, and efficiency, ensuring rapid cycle times and successful first-silicon-success tape-outs.
• Work with firmware teams to enable robust software support for wireless products.
• Coordinate with IP vendors and internal stakeholders to align on technical needs and project roadmaps.
• Mentor engineers to build deep subject-matter expertise within the team.
• Promote teamwork, cooperation across geographies, and a positive, inclusive workplace culture.

Requirements/Qualifications:

• 15+ years of hands-on experience with SOC design (Verilog/SystemVerilog), architecture and functional verification (UVM, assertions, coverage).
• Bachelor’s degree in Computer Science, Engineering or a related field.
• Proven expertise in microarchitecture, microcontroller development and wireless product implementation.
• Knowledge of Bluetooth/BLE/Wi-Fi communication principles and standards.
• Strong understanding of low-power design, and power/analog subsystems.
• Comprehensive knowledge of the microcontroller development lifecycle, including marketing requirements, pre-silicon and post-silicon validation, and production testing.
• Proven track record leading tape-outs with distributed cross-geography teams.
• Familiarity of Functional Safety (FuSa) and cybersecurity standards for embedded products.

Preferred Skills and Experience:

• Master’s degree in omputer engineering, electrical engineering, or a related field.
• Experience with industry-leading SoC EDA tools and flows.
• Knowledge of security features and related design principles.
• Background in validation methodologies, including debugging on FPGA and silicon IC boards.

Travel Time:

0% - 25%

Physical Attributes:

Hearing, Seeing, Talking, Works Alone, Works Around Others

Physical Requirements:

80% Sitting, 10% Standing, 10% Walking

Pay Range:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below:

Benefits of working at Microchip

The annual base salary range for this position, which could be performed in the US, is $91,000.00 - $232,000.00.*

Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.

For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.

To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.