Senior Digital Design Engineer

Location: India - Bangalore

Time Type: Full time

Job Description

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.

Visit our careers page to see what exciting opportunities and company perks await!

Job Description:

Role Summary

We are seeking a highly motivated Senior Digital Design Engineer to design and develop digital-based products. In this role, you will have the ability to contribute to core research, technology development, and project execution, directly contributing to the creation of new products and improved methodologies. As a member of the design team, you will own the design of digital blocks from specification through to stream-out.

Key Responsibilities

• RTL Design & Implementation: Define and implement robust RTL-based design solutions using Verilog and SystemVerilog.
• Advanced Design Techniques: Execute designs utilizing Clock Domain Crossing (CDC), clock gating, and low-power techniques (UPF).
• Design Verification: Perform simulations to validate logic and conduct CDC analysis to ensure design integrity.
• Silicon Debug: Support analytical debugging efforts for silicon during the prototype design phase.
• Cross-Functional Collaboration:
  • Partner with the Analog Team to define and refine mixed-signal interfaces.
  • Work closely with the Verification Team to support testbench development and debug.
  • Assist the IC Implementation Team with Synthesis and Static Timing Analysis (STA) constraints.

Requirements/Qualifications:

Mandatory Qualifications

Technical Competencies:

• Flow Mastery: Deep understanding of the complete digital design flow from Spec to streamout.
• Expert Proficiency: Strong command of Verilog / SystemVerilog for design.
• Low Power: Experience with low-power design standards and UPF.
• Critical Analysis: Hands-on experience with CDC analysis, Clock Gating optimization and STA.
• DFT: Extensive experience with testability techniques, including scan test and test pattern generation.
• Tools & Schematics: Ability to navigate and edit schematics and gate-level netlists; proficiency with industry-standard digital simulators.

Soft Skills:

• Excellent problem-solving capabilities with a proactive approach to debugging.
• Self-motivated with strong communication skills, capable of working effectively in a team environment.

Preferred Qualifications

• Memory Expertise: Knowledge of Non-Volatile Memory (NVM) design is high preferable.
• Protocols: Familiarity with serial communication protocols (e.g., SPI, I2C).
• Verification: Knowledge and ability to implement SystemVerilog Assertions (SVA).

Education & Experience:

• Bachelor’s Degree (or higher) in Electrical Engineering.
• Minimum of 4 years of hands-on experience in digital design.

Travel Time:

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