- Collaborate with computer architects, software, ML and silicon engineers, to map and optimize ML workloads on various backend targets including CPU’s, DSP’s and Deep Learning Accelerators.
- Perform ML algorithm, software, hardware co-design to achieve best energy and performance efficiency.
- Develop performant C/C++ kernels and optimize domain specific compilers to port industry standard ML libraries to custom hardware.
- Review SOTA research trends in hardware specific ML model optimizations and mapping.
- Evaluate and integrate promising techniques into shipping products.
- Run analysis/profiling, identify performance and power bottlenecks on the actual hardware, virtual platforms, simulators or emulators and provide feedback for optimizations across the stack.
- Currently has, or is in the process of obtaining, a PhD degree in Computer Science, Electrical Engineering or related field.
- Experience with Python (or similar) scripting and exposure to ML frameworks like Pytorch/TF.
- Experience in software design and programming in C/C++.
- Understanding of computer architecture and performance implications.
- Must obtain work authorization in the country of employment at the time of hire and maintain ongoing work authorization during employment.
- Intent to return to a degree-program after the completion of the internship.
- Experience with hardware acceleration on GPU’s/CPU’s/DSP’s/custom-ASICs.
- Proven track record of achieving significant results, as demonstrated by first-authored publications at leading workshops or conferences in computer vision/machine learning (e.g., CVPR, ICCV, ECCV, NeurIPS, ICML) or computer architecture (e.g., ISCA, ASPLOS, MICRO, HPCA).
- Experience and understanding of classic ML, CV algorithms, DeepLearning algorithms like BERT, RNN, CNN and frameworks like Tensorflow/Pytorch.
- Familiarity with the state of art ML algorithm optimizations like Neural Architecture Search, quantization, pruning etc.
- Familiarity with Deep learning compilers like tensor-rt, XLA is a plus.
- Familiarity with high performance sw kernel development for customized ISA.
- Familiarity with code profiling and debug tools. Tools in the context of ML is a plus.
- Ability to read code, trace them, and code refactor.
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