- Manage a team including system architecture, display EE, pixel pipeline and image processing algorithm engineers
- Define the end to end display panel architecture and incorporate the requirements meeting PRD across power, size, performance, and cost attributes
- Drive image algorithm development and calibration strategy in partnership with other display pillar leads, including design for manufacturing to close loop on algorithms and product performance
- Work across XFN partners to set up validation, verification, tuning, calibration, plans and other enabling support
- Collaborate with silicon architecture and internal/external silicon design partners on driving execution backplane activities for wearable AR products including uLED, LCoS and emerging technologies
- Prototype solutions using simulators, FPGAs, and non-form-factor modules to gather data and create an understanding surface predictive of final design performance
- Work across organizations in defining the roadmap and long-term platform development strategy for display silicon, taking into account desired image processing approaches, light source and modulation technologies, outcoupling strategies, and combiner implementations
- Master's degree or above in Electrical Engineering, Computer Science, or a related field
- 10+ years of experience in the display industry, with a focus on electrical system, electron to photon conversion, optical systems and AR/VR/MR projection design
- Proven technical expertise in display technologies, including OLED, LCD, LED, and LCoS
- Experience leading cross-functional teams and collaborating with external partners
- Effective communication and presentation skills
- Experience to work independently and in a fast-paced environment
- Interest for innovation and staying ahead of the curve in display technology
- Ph.D. degree in Electrical Engineering
- Experience in design and architect silicon backplane for microdisplay application
- Familiar with Imaging Processing IP design
- Good understanding of pixel pipeline for displays and silicon backplane architecture
- Good understanding of the front-end analog/digital design flow: RTL design, logic synthesis, timing verification.
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