- Communicate your innovative architectural solutions with your peers and leadership, while mentoring members of the architecture team.
- Collaborate with cross functional teams working on RTL design, Design Verification, Firmware/Software development, Pre-Post silicon validation and Program Management to deliver first pass functional silicon on an aggressive schedule.
- Define and implement the testing approach for custom chips designed by our ASIC team.
- Develop and maintain testing infrastructure, including disk space and compute capacity management.
- Implement monitoring, reporting, and metrics collection to track the quality, performance, and utilization of testing infrastructure.
- Collaborate with ASIC developers to automate testing and ensure continuous integration and delivery.
- Drive quality, evidence-driven debugging/triage, root cause analysis, and test-driven development within the team.
- Utilize Python, Jinja2/Templating engines, Make/CMake, Bazel/Blaze/Buck build tools, Git/Mercurial, YAML, JSON, and other relevant technologies for software development.
- Develop and maintain automated dashboards that provide real-time visibility into the team’s progress, including work remaining, work completed, change fail rate, lead time for changes, time to recover test failures, and other key performance metrics, ensuring transparency and accountability across the organization.
- Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
- 8+ years of software development experience.
- Experience with embedded software/firmware development with compilers/linkers including at the assembly level.
- Proficiency in Python and experience with build tools like Make/CMake, Bazel/Blaze/Buck.
- Knowledge of version control systems such as Git/Mercurial.
- Familiarity with YAML and JSON for configuration and data exchange.
- Experience in evidence-driven debugging, root cause analysis, and test-driven development.
- Proficiency in C++: experience in developing software components for hardware modeling and simulation.
- Proficiency in configuring, extending, and optimizing these simulators for specific testing scenarios is a valuable skill.
- Familiarity with hardware modeling concepts, including the experience to work with hardware description languages.
- Experience in debuggers for development/debug.
- Knowledge of verilog tools and compilation flows is advantageous.
- Familiarity with popular AI frameworks like PyTorch, TensorFlow, Caffe2, and others is a plus.
- Understanding the intricacies of hardware design and modeling.
- Experience with hardware simulators such as Imperas and QEMU.
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