Staff SW Dev Engineer

Location: Bayan Lepas, Penang, UNAVAILABLE, MY

Employment Type: FULL_TIME

Lattice Overview

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Responsibilities & Skills

A successful candidate will join a team designing and developing Lattice FPGA software tools at Penang. The candidate will contribute to research, design and development of FPGA primitives, Foundation IP and IP Catalog tooling. The candidate is expected to work closely with cross-functional teams to plan and execute Lattice FPGA software release cycle including requirement analysis, feature scoping, development, testing and validation. The candidate also will be responsible for maintaining existing software product tools and develop improvement plan to increase the test coverage to achieve high product quality.

 

Requirements & Skills:

• Bachelors, Masters or better in Computer Science, Computer Engineering, Electrical Engineering, or related fields with 8+ years of experience in EDA SW Tool development 

 

Experience:

• Strong communication skills.

• Knowledge or experience in FPGA architecture and FPGA software tools, specifically for device modeling and soft IP development.

• Programming skills (C++ and Python).

• Hands-on experience in FPGA RTL design, testbench development, logic verification, timing closure and debugging.

 

Preferred Experience:

• Expert in one or more FPGA primitives such as embedded block RAM, DSP blocks, PLL, oscillators, I/O Gearing, configuration/security or power related silicon features.

 

Behaviors/Motivations:

• Technical leadership: Serves as a recognized technical leader who influences cross‑organization engineering decisions/efforts.

• Accountability: Owns outcomes spanning multiple projects or releases, balancing short‑term delivery with long‑term technical health.

• Execution: Anticipates organizational and technical risks and drives alignment across teams to resolve them.

• Mentorship: Creates leverage by mentoring engineers, setting technical direction, and establishing best practices adopted broadly.