Senior Memory Designer

Location: Bayan Lepas, Penang, UNAVAILABLE, MY

Employment Type: FULL_TIME

Lattice Overview

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality. Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Responsibilities & Skills

We are seeking an experienced Memory Designer to join our team. The ideal candidate will have over 10 years of experience in designing and implementing high-performance, low-power memory circuits as well as low-power configuration memory and architectures. This role involves working on cutting-edge technology and contributing to the development of innovative memory

solutions.

Key Responsibilities:

• Design and Development: Lead the design and development of custom circuits for high-speed and low-power SRAM and low-power configuration RAM (CRAM)

• Architecture and Implementation: Develop memory architectures and implement them in advanced semiconductor technologies, including FinFET and nanometer CMOS

• Simulation and Verification: Perform schematic capture, simulation, and margin verification of major memory blocks

• Layout Planning: Oversee layout planning and ensure tight pitch-matched memory layout designs

• Collaboration: Work closely with architecture and design teams to define memory PPA (Performance, Power, Area) and yield targets

• Full Design Flow: Manage the full embedded memory design flow, including architecture, circuit design, physical implementation, compiler usage, characterization, timing, and model generation

• Innovation: Bring innovative and revolutionary ideas to life in our products, influencing various parts of our FPGA designs

Qualifications:

• Education: Bachelor’s degree in electrical engineering, or a related field. A Master’s or PhD is preferred

• Experience: Over 10 years of experience in memory design, verification, validation, and integration

• Technical Skills:

  • Strong knowledge of custom memory design, high speed, low power as well as custom memory design for configuration of FPGA

  • Expertise in high-performance and low-power design techniques

  • Familiarity with variation-aware design in advanced semiconductor technologies

• Soft Skills: Excellent problem-solving skills, strong communication abilities, and the ability to work collaboratively in a team environment

Preferred Qualifications:

• Experience with large density memory cell design for high yield

• Knowledge of semiconductor device fundamentals