Design Verification Engineer (Senior/Staff)

Location: Bayan Lepas, Penang, UNAVAILABLE, MY

Employment Type: FULL_TIME

Lattice Overview

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality. Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Responsibilities & Skills

Lattice Semiconductor is seeking a Design Verification Engineer to join the RnD organization.This position is an opportunity to be part of a dynamic team with ample opportunity to contribute, learn and grow.

Responsibilities & Skills:

We are seeking a IP DV engineer with significant hands-on experience in pre-silicon Design verification, verification methodologies and UVM/OVM.

• Develop and Review Test Plan based on design specification

• Develop constrained-Random verification environment for complex DUT

• Implement coverage metrics using cover point and assertion

• Create and debug tests for DUT

• Resolve bugs with remote designers

Requirements:

• Strong understanding of verification process from test plan to coverage completion

• Strong communication and Analytical skills

• Understanding of HDL (Verilog, SystemVerilog)

• Experience with designing with FPGA is a plus

• Programming skills (e.g.: C/C++, Perl, TCL or Python).

• Experience in following technology areas are an added advantage : High speed SERDES protocols (PCIe, Ethernet, CPRI or JESD204B/C, USB), Memory (DRAM, SRAM, Flash, DMA), Interconnect (AMBA AXI, AHB, APB), Peripherals (SPI, I2C or I3C)

Education and General:

• BS/MS/PhD in Electronics or Computer Engineering minimum of 5 years of SystemVerilog/UVM

• Independent and self-motivated, capable of executing under dynamic environment and uncertainties