we Are having Porting legacy PCIE
Location: Hillsboro, OR, us
Company Description
Thanks & Regards
Kumar.T | Resourcing Executive
KRG Technologies, Inc.,
25000 Avenue Stanford, Suite #243, Valencia, CA 91355
Direct : 661-367-8000 Ext : 303 | www.krgtech.com
Job Description
Job description:
Title : Porting legacy PCIE ( or go as per the key words) : 1 Positions ( Title : IP Content Porting)
Location : Hillsboro , OR
Salary : $90k ( No TP)
Citizen and GC only
“ INTEL HAVE THEIR OWN TOOL WHICH IS WRITTEN IN C++, THEY ARE CONVERTING THE SAME TOOL TO A NEW TOOL ( WHICH IS KNOWN AS PORTING )”
MAJOR SKILLS TO LOOK FOR : CANDIDATE WITH VAST EXPERIENCE IN C++, WHO HAS EXPERIENCE IN HW INTERFACE.
HW INTERFACE ( SOMEONE WHO HAS EXPERIENCE WITH ANY ON THE PROTOCOLS, LIKE USB, PCIE, SATA)
ENVIRONMENT : LINUX
WE NEED A CANDIDATE WHO IS MASTER IN C++, WITH EXPERIENCE IN HW INTERFACE EXPERIENCE AND WORKING ON LINUX ENVIRONMENTProject Overview (short summary):
Metro is pre-Si tool which provides key coverage for transactional IPs/buses such as PCIe, OPIO, DMI in the pre-Si timeframe. We need to provide equivalent coverage in Maestro. And hence responsibility of the team will be to work with Maestro Core team to port selected Metro tests to Maestro and enable them on SKL OR ICL SLE
Required Skills/Expertise:
Strong C++ programming background
IA32; PCIe IP knowledge; buses: OPIO, DMI
Debug in SLE environment
Motivated team player who can deal with ambiguity
Additional Information
All your information will be kept confidential according to EEO guidelines.
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