ITRI

AI Chip and Middleware Engineer Intern

AI C C++ Deep Learning FPGA HPC Image processing Linux Python QEMU RISC-V SystemC Verilog
Description

SSTC_AI Chip and Middleware Engineer Intern (A000)

This internship is in ITRI's Service Systems Technology Center(SSTC).

We are looking for talents to join us in AI chip system design and instruction set extensions
for applications such as Artificial Intelligence and High‑Performance Computing (HPC).

Candidates with any of the following expertise are welcome:

  1. AI accelerator hardware architecture performance analysis and system‑level modeling/simulation
  2. RISC‑V computing architecture, instruction set extensions, and development of simulation platforms (e.g., QEMU)
  3. FPGA platform development, integration, and verification (including test data flow validation)


Qualifications:

  1. Relevant majors include Computer Science, Electrical and Electronic Engineering, or related disciplines.
  2.  Language proficiency: Intermediate English proficiency (listening/speaking/reading/writing).
Professional Skills / Tools:
  1. Proficiency in at least one programming language: C, C++, or Python.
  2. Candidates with any of the following expertise will receive priority consideration:
    • Deep learning models and AI inference principles
    • Processor / AI accelerator / SoC architecture design
    • QEMU or Linux kernel development
    • Computer organization and microarchitecture analysis
  3. Familiarity with the following languages is a plus: Verilog, SystemC, C/C++, Python
  4. The following hands-on experience is highly preferred:
    • Image processing algorithms
    • Deep learning model architectures
    • RISC-V
    • FPGA development
ITRI
ITRI

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