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Transport Silicon Product Architect

Intel

Hybrid
Santa Clara, CA
Full-time
Senior
Staff
6+ yrs
$221k–$312kPosted 1h ago

Real job — pulled straight from Intel’s careers page · Verified August 13, 2026 · No reposts.

Job description

Intel is hiring a Transport Silicon Product Architect — a full-time, based in Santa Clara, CA role ($221k–$312k). Apply directly on Intel's careers page below.

Transport (RDMA) Silicon Product Architect

Location: US, California, Santa Clara, US, Texas, Austin, US, Oregon, Hillsboro

Time Type: Full time

Job Description

Job Details:

Job Description: 

We are seeking a visionary senior architect to contribute to the architecture of next-generation transport protocols and networking solutions for large-scale AI, cloud, and high-performance computing systems. In this role, you will define how distributed systems move data efficiently, reliably, and at scale. You will drive the architecture of RDMA transports, congestion management frameworks, reliability mechanisms, and collective communication optimizations that directly influence cluster performance and application efficiency. Success requires deep understanding of networking, distributed systems, transport protocol design, and workload behavior. You will work across silicon, firmware, software, system architecture, and industry ecosystems to shape technologies that enable scalable AI infrastructure and next-generation datacenter fabrics. Key Responsibilities - Transport Architecture Leadership - RDMA and Fabric Architecture - Congestion Management and Network Efficiency - AI and Collective Communication Optimization - Industry and Technical Leadership Desired Technical Expertise - Deep expertise in transport protocol architecture. - Strong understanding of RDMA technologies, including transport semantics and deployment challenges. - Experience with congestion control, flow control, traffic engineering, and large-scale fabric behavior. - Understanding of AI communication patterns and collective operations. - Knowledge of NIC, switch, and host software interactions across the networking stack. - Experience analyzing performance and scalability limitations in distributed systems. - Ability to translate workload requirements into deployable transport and network architectures.

Qualifications:

Qualifications - Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or a related technical field, or equivalent practical experience. - 12+ years of experience with a Bachelor's degree, 8+ years with a Master's degree, or 6+ years with a PhD in networking, distributed systems, datacenter infrastructure, or related domains. - Deep expertise in transport protocol architecture, including protocol semantics, reliability mechanisms, congestion management, flow control, and performance optimization. - Strong understanding of RDMA technologies and large-scale deployment challenges, including scalability, fairness, resource management, and operational resiliency. - Experience architecting high-performance communication systems spanning hardware, firmware, software, and system-level components. - Demonstrated ability to analyze and solve complex networking challenges involving latency, throughput, tail performance, congestion, packet loss, and workload efficiency. - Experience translating application and workload requirements into transport, networking, and communication architecture specifications. - Strong understanding of distributed computing and communication patterns used in AI, HPC, cloud, or large-scale datacenter environments.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location: 

US, California, Santa Clara

Additional Locations:

US, Oregon, Hillsboro, US, Texas, Austin

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

 

 

Annual Salary Range for jobs which could be performed in the US: $220,920.00-311,890.00 USD

 

 

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

 

 

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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Frequently asked questions

What is the salary for Transport Silicon Product Architect at Intel?

The estimated salary range for Transport Silicon Product Architect at Intel is $221,000 - $312,000 USD per year.

What skills are required for Transport Silicon Product Architect at Intel?

The required skills for Transport Silicon Product Architect at Intel include: Networking, AI.

What is the seniority level for Transport Silicon Product Architect at Intel?

Transport Silicon Product Architect at Intel is a Senior / Staff / Principal level position.

How do I apply for Transport Silicon Product Architect at Intel?

You can view the full description and apply for Transport Silicon Product Architect at Intel on EchoJobs: https://echojobs.io/job/intel-transport-rdma-silicon-product-architect-syddk.