Job Details:

Job Description: 

Senior Power/Signal Integrity engineering positions available at AI/Datacenter Platform Groups(DPG), Intel India. Top expertise in AC and DC Power Integrity analysis, simulations, and measurements is a must. Should be well versed in time domain and frequency domain analysis. Proven record in enabling Power Integrity solution for high power and high-speed rail. Excellence in setting up and running simulations in Cadence PowerSI, PowerDC, OptimizePI, or equivalent Ansys Tools like SIwave. Knowledge and understanding of how power integrity on die, package, and board affect bit error rate of serial and parallel interfaces, such as high-speed serial channels (i.e., 56G/112G PAM4 and beyond, PCIe Gen4/5/6, etc.) and DDR4/DDR5 memories are needed. A basic understanding of cross domains like Package, System, Silicon engineer is an added advantage. Familiarity with 3D EM tools like HFSS, Clarity, CST etc is needed. Working knowledge of statistical analysis like DOE will be an added advantage. Excellent communicator, specifically interfacing with hyper scale data center customers and in-house Si teams. In this position, you will be responsible for providing package and platform power integrity solutions for Intel datacenter/AI products.

Your responsibilities will include but not be limited to:

• Performs comprehensive simulations and validations to generate Intel design guidelines to guide system-level power integrity design including, but not limited to, Silicon, package, socket, boards, and voltage regulators.
• Performs AC and transient simulation to provide impedance profile of the whole power delivery path, from the VR to the motherboard, the package and the die.
• Perform time domain analysis in HSPICE, ADS to find noise levels in I/O rails.
• Provides guidance to the design team on capacitor numbers and values and power plane shape and width.
• Correlating simulations with system measurements.
• Deliver optimized PI solution meeting the product performance
• Provides DC and resistance simulation to provide Rpath from the VR to the package pins, voltage drop, current density and power loss analysis.
• Performs transfer impedance simulations to provide plane split and isolation guidance between interfaces on board package area.

Qualifications:

• Minimum qualifications, You must possess the below minimum qualifications to be initially considered for this position:
• B.Sc/B.E/B.Tech. (+6 years of experience) or M.Sc. (+4 years of experience), or PhD (+2 years of experience) in Electrical Engineer, Mechanical Engineer or related field:
• Experience required:
  • working with CAD tools: Cadence Allegro or Mentor Expedition, or equivalent.
  • Working with HSpice simulation.
  • Decoupling tradeoffs and layout technics for PCB.
  • DC and transient droop analysis.
  • Experience of SI analysis at package/PCB/Die level. Preferred qualifications, The following preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates:
  • Solid understanding of Electromagnetics and transmission line concepts.
  • SSO simulation experience is a plus.
  • Hands-on experience with EDA tools: Ansys HFSS , Ansys Siwave, Agilent ADS or equivalent.
  • Familiar with current profile generation (Icc) process.
  • Experience in Power noise/jitter simulation.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location: 

India, Bangalore

Additional Locations:

Business group:

The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.