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RTL Design Engineer

Intel

On-site
Austin, TX
Full-time
Entry
2+ yrs
$106k–$200kPosted 2w ago

Real job — pulled straight from Intel’s careers page · Verified July 28, 2026 · No reposts.

Job description

Intel is hiring a RTL Design Engineer — a full-time, based in Austin, TX role ($106k–$200k). Apply directly on Intel's careers page below.

RTL Design Engineer

Location: US, Texas, Austin, US, Arizona, Phoenix, US, Oregon, Hillsboro

Time Type: Full time

Job Description

Job Details:

Job Description: 

Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU required to generate cell libraries, functional units, and the CPU IP block for integration in full chip designs. Participates actively in the definition of architecture and microarchitecture features of the CPU being designed. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation. Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Documents micro architectural specs (MAS) of the CPU features being designed. Supports SoC customers to ensure highquality integration of the CPU block.

Qualifications:

Minimum Qualifications • The candidate must have a Bachelor’s Degree in Electrical or Computer Engineering or any STEM related education with at least 2+ years of experience -OR- Master's Degree in Electrical or Computer Engineering • At least 1+ years of coursework or experience in the following areas: o Basic Logic Design o Microprocessors o Computer Architecture o Digital design and RTL coding o Verilog/SystemVerilog and/or VHDL o Synthesis tools (Design Compiler, Genus) o Scripting languages (Python, Perl, TCL) Preferred Qualifications • Experience with advanced verification methodologies (UVM, OVM) • Knowledge of low-power design techniques • Understanding of physical design constraints and timing closure • Experience with version control systems (Git, Perforce) • Experience with simulation tools (ModelSim, VCS, Xcelium)

Job Type:

College Grad

Shift:

Shift 1 (United States of America)

Primary Location: 

US, Texas, Austin

Additional Locations:

US, Arizona, Phoenix, US, Oregon, Hillsboro

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

 

 

Annual Salary Range for jobs which could be performed in the US: $105,650.00-200,340.00 USD

 

 

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

 

 

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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Frequently asked questions

What is the salary for RTL Design Engineer at Intel?

The estimated salary range for RTL Design Engineer at Intel is $106,000 - $200,000 USD per year.

What skills are required for RTL Design Engineer at Intel?

The required skills for RTL Design Engineer at Intel include: Verilog, SystemVerilog, VHDL, Python, Perl, Git.

What is the seniority level for RTL Design Engineer at Intel?

RTL Design Engineer at Intel is a Entry level position.

How do I apply for RTL Design Engineer at Intel?

You can view the full description and apply for RTL Design Engineer at Intel on EchoJobs: https://echojobs.io/job/intel-rtl-design-engineer-tefci.