Job Details:

Job Description: 

Directs and manages the Analog Product Development Engineering teams responsible for Analog IPs circuit testability across IP/SOC Concept, test strategy definition, enablement, and execution through production ramp across various disciplines (Clocking, Power, Thermal, HighSpeed IO/GPIO, Embedded/RF, Hardware, etc.). Drives activities of research and execution across technical functions responsible for designing, developing, modifying, modeling and analyzing analog and mixed signal electronic parts, components, interconnects, or integrated circuitry for hardware systems and electrical performance to specifications. Evaluates final results of research/execution to assure accomplishment of technical objectives; prepares and presents reports outlining the outcome of technical projects and makes recommendations for actions necessary to achieve desired results and quality. Influences and drives strong collaboration across IP/design, manufacturing architecture, test technology, fab, assembly/test, validation, and BU (Business Unit) partners to ensure manufacturing test capability, quality, and cost targets met. Technical leadership in analog/SOC domains to resolve complex roadblocks throughout the entire product cycle; communicates status and/or risk/choices to senior management. Responsible for driving schedule and enabling teams to execute flawlessly through clear goal setting, maintaining accountability, applying performance management, and building technical development path in analog disciplines; as well as other HW/SW ingredients for career growth. Drives results by inspiring people, role modeling Intel values, developing skillset, and ensuring a collaborative and productive work environment.

Qualifications:

To be successful in this role, candidates must meet the following minimum qualifications:

Education: Bachelor's degree or higher in Electrical Engineering, Computer Engineering, Physics, or a closely related field.

Experience:

A minimum of 10 years of industry experience in analog and mixed-signal circuit design, including at least 5 years in a leadership or management position.
Proven track record of leading teams in the development and test strategy execution for analog IPs in SoCs (System-on-Chip).
Hands-on experience with analog circuit performance analysis, modeling, and test enablement across a variety of analog domains such as power, clocking, thermal, high-speed I/O/GPIO, embedded/RF, and hardware systems.
Experience working with cross-functional teams (e.g., design, manufacturing, test, validation) to achieve production ramp goals and quality targets.
Technical Expertise:

Deep understanding of analog and mixed-signal circuit behavior, testing methodologies, and debugging techniques.
Ability to evaluate analog circuits' electrical performance and provide solutions for technical challenges throughout the product development cycle.
Communication Skills:

Strong written and verbal communication skills, with the ability to present complex technical findings to senior management and other stakeholders.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (Malaysia)

Primary Location: 

Malaysia, Penang

Additional Locations:

Business group:

The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.