Groq

Senior ASIC Design Verification Engineer

Remote Mountain View, CA
USD 181k - 318k
Python Perl Machine Learning
Description

About Groq

Groq delivers fast, efficient AI inference. Our LPU-based system powers GroqCloud™, giving businesses and developers the speed and scale they need. Headquartered in Silicon Valley, we are on a mission to make high performance AI compute more accessible and affordable. When real-time AI is within reach, anything is possible. Build fast.

Senior ASIC Design Verification Engineer

Mission: Groq is a machine learning systems company building easy-to-use solutions for accelerating artificial intelligence workloads.  Our work spans hardware, software, and machine learning technology. We are seeking an exceptional Design Verification Engineer who is interested to join our Hardware team. You will work closely with internal interdisciplinary teams to drive key aspects of ASIC verification. This is a dynamic fast-paced environment requiring hands-on involvement. You must be responsive, flexible and able to succeed within an open collaborative peer environment.

Responsibilities & opportunities in this role:

  • Verify hardware features of Language Process Unit (LPU). 
  • Collaborate within the Hardware Team to design and verify features on LPU chips in simulation, emulation and silicon.
  • Develop and implement advanced verification environments and methodologies for complex ASIC designs.
  • Implement and optimize automated verification flows to improve productivity and efficiency.
  • Utilize formal verification techniques to rigorously verify critical design properties and ensure compliance with specifications.
  • Stay updated on the latest trends and advancements in ASIC design verification and incorporate innovative techniques into the verification process.
  • Support silicon bring-up and debug.
  • Be a productivity multiplier. Contribute to identifying and adopting engineering best practices within the verification team and interactions with cross-functional teams at Groq. 
  • Innovate. Contribute to developing future verification strategies for validating future accelerator chips and hardware architectures for ML workloads. 

Ideal candidates have/are:

  • Ability to build strong cross-functional team relationships
  • Good written and oral communication skills; strong technical documentation skills
  • Highly self-motivated and directed; self-confidence and self-starter
  • Keen attention to detail
  • Proven analytical and problem-solving abilities
  • Ability to effectively prioritize and execute tasks in a high-pressure environment
  • Experience working in a team-oriented, collaborative environment

Qualifications for this role:

At minimum:

  • BS degree in electrical engineering, or related fields, or equivalent practical experience; advance degrees (MS or PhD) is a plus
  • 10+ years design verification experience of building testbenches environments and design verification processes

Highly valued, not required:

  • Excellent verbal and written communication skills to clearly communicate concepts in written and verbal form to stakeholders.
  • Experience with building block and SOC testbench development
  • Good familiarity with SystemVerilog and UVM
  • Good familiarity with randomly constrained testing methodologies.
  • Good familiarity with power verification strategies and UPF
  • Good familiarity with netlist simulation
  • Good familiarity with formal verification flow and tools
  • Experience in Python and/or Perl scripting
  • Knowledge of ASIC design flow
  • Knowledge of applying machine learning to ASIC verification flow
  • Knowledge of silicon bring-up, debug, and manufacturing ATE support
  • Proven track record of delivering bug-free silicon

Attributes of a Groqster:

  • Humility - Egos are checked at the door
  • Collaborative & Team Savvy - We make up the smartest person in the room, together
  • Growth & Giver Mindset - Learn it all versus know it all, we share knowledge generously
  • Curious & Innovative - Take a creative approach to projects, problems, and design
  • Passion, Grit, & Boldness - no limit thinking, fueling informed risk taking

If this sounds like you, we’d love to hear from you!

Compensation: At Groq, a competitive base salary is part of our comprehensive compensation package, which includes equity and benefits. For this role, the base salary range is $181,700 to $318,000, determined by your skills, qualifications, experience and internal benchmarks.

Location: Groq is a geo-agnostic company, meaning you work where you are. Exceptional candidates will thrive in asynchronous partnerships and remote collaboration methods. Some roles may require being located near our primary sites, as indicated in the job description.  

At Groq: Our goal is to hire and promote an exceptional workforce as diverse as the global populations we serve. Groq is an equal opportunity employer committed to diversity, inclusion, and belonging in all aspects of our organization. We value and celebrate diversity in thought, beliefs, talent, expression, and backgrounds. We know that our individual differences make us better.

 

Groq is an Equal Opportunity Employer that is committed to inclusion and diversity. Qualified applicants will receive consideration for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, disability or protected veteran status.  We also take affirmative action to offer employment opportunities to minorities, women, individuals with disabilities, and protected veterans.

Groq is committed to working with qualified individuals with physical or mental disabilities. Applicants who would like to contact us regarding the accessibility of our website or who need special assistance or a reasonable accommodation for any part of the application or hiring process may contact us at:  talent@groq.com.  This contact information is for accommodation requests only.  Evaluation of requests for reasonable accommodations will be determined on a case-by-case basis.

 Groq
Groq
Electronics Machine Learning Semiconductor

2 applies

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