Principle Analog/Mixed-Signal Engineer
Department: Cryo-CMOS
Location: Dublin
Employment Type: FullTime
We are seeking a highly accomplished Analog/Mixed-Signal Engineer to join our silicon design team. This is a pivotal and technically influential role within Equal1, responsible for the architecture, design, and delivery of advanced mixed-signal circuits that define the next generation of our Quantum System-on-Chip (QSoC) devices. The successful candidate will combine deep analog design expertise with strategic vision and technical leadership across the silicon development lifecycle.
Main Duties and Responsibilities
Define, architect, and drive the mixed-signal subsystem and IP-level specifications in alignment with product roadmaps and system requirements, applying rigorous design trade-off analysis to guide decisions on performance, power, and scalability.
Lead the detailed design, simulation, and implementation of cryogenic analog and mixed-signal circuits central to our quantum processor technology, including custom layout development and review for precision, matching, and parasitic optimization.
Establish and promote best-practice design methodologies and verification flows using state-of-the-art EDA tools, from concept through custom layout and GDSII to post-silicon validation.
Act as a technical authority and peer reviewer across multiple IP blocks to ensure design quality, reliability, and right-first-time execution.
Perform in-depth circuit and system-level performance analysis, including power, area, timing, noise, matching, and ESD robustness, identifying opportunities for optimization.
Collaborate closely with system architects, verification, and modelling teams to develop AMS behavioural models, test benches, and verification strategies that ensure complete functional coverage.
Partner with cross-functional teams, including applications, digital design, functional verification, test engineering, and quantum device physics, to ensure seamless integration and performance alignment.
Lead or contribute to post-silicon validation and bring-up, including test plan definition, debug, and correlation between simulation and measurement data.
Mentor and provide technical guidance to junior engineers, contractors, and external design partners, fostering a culture of technical excellence and innovation.
Experience and Qualifications
Required
PhD, MSc. or Bachelor’s degree in electronic engineering, physics or related discipline.
A minimum of 16 years’ experience in progressive analogue and/or mixed-signal IC design roles.
Experience designing analogue mixed signal circuitry and architectural development required for FDX22SOI and/or finFET technologies.
Expertise in the use of industry-standard IC design, simulation and functional and physical verification tools in deep-sub micron technologies.
Proficiency in a variety of circuit designs for single electron detection, low power RF for electron spin manipulation, low noise clock recovery, and distribution.
Strong background in circuit analysis, considering factors such as noise, power consumption, timing, signal integrity, and ESD strategy.
Demonstrated experience in several successfully completed projects, leading large integration activities with multiple contributors.
Experience in mentoring junior members and supervising contractors and 3rd party engagements.
Experience working with PDKs and design rule manuals from various leading foundries, and designing ESD strategies for multiple voltage domains.
Experience with Verilog-AMS for behavioural modelling and system-level modelling.
Experience with layout-driven design, custom analog cell, collaborating closely with physical design teams to ensure optimal device matching, parasitic control, and routing integrity.
Experience with validation, test and measurement requirements and ability to prescribe the testing to validate designs using bench equipment.
Ability to execute multiple tasks efficiently and effectively.
Strong interpersonal skills and an ability to work well in a team.
Willing to work in an environment that allows initiative and requires flexibility.
Desired Experience
Strong knowledge of semiconductor device physics fundamentals is desired.
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