Analog Mixed-Signal Design Engineer

Department: ASIC

Location: Alameda HQ

Compensation: $175K – $215K

Employment Type: FullTime

About Us

Epia Neuro is a neural technology company developing intent-driven systems designed to restore function and independence for people living with neurological conditions. Its platform integrates implantable neural interfaces, adaptive algorithms, and assistive devices to translate neural intent into real-world action. The company’s initial focus is stroke-related motor impairment, with expansion in cognitive decline and other neurological disorders, focusing on long-term solutions for the growing aging population.

How We Work

• We are intentional. We prioritize and are thoughtful about how we use others’ time.

• We care for others. We prioritize safety both for patients and one another.

• We own outcomes, not just tasks. Our work demands the highest standards because it impacts real patients and real lives.

• Humility is a strength. We are honest about what we know and what we don’t know. Getting it right matters more than being right.

The Role

We are seeking an Analog Mixed-Signal Design Engineer to join a close-knit team, and help build next-generation ASICs. This is a highly hands-on role for someone who wants to apply and showcase their breadth and depth of knowledge in chip design.

Ideal candidate would take ownership of modules/blocks – specification-to-design life cycle – and document/perform: architecture exploration, transistor-level design, pre- and post-layout simulation, and Monte Carlo/SOA/reliability/aging verification. The candidate would be comfortable with ambiguity that comes with working in compact and fast-paced environments, and be willing to involve in ancillary activities, such as post-silicon bring-up/debug and validation/characterization.

This role is ideal for someone who has experience in all aspects of chip design with core competency in AMS IC design.

Key Responsibilities

• Document all aspects of design, and treat documentation as first-class citizen.

• Apply spec-driven methodology to ensure scalable, consistent, and reproducible design.

• Design high-precision, low-noise, ultra-low-power analog and mixed-signal circuits – e.g. bandgap reference, clocks, IO, PLLs, ADCs.

• Model circuits in Verilog-A/AMS, Verilog, and/or System Verilog.

• Lead and participate in design reviews.

• Collaborate closely with layout, digital, and test engineers.

Required Qualifications

• MS with 8+ years, or PhD with 5+ years of experience in AMS IC design/verification with multiple successful tapeouts

• Experience with BCD and SOI process

• An expert in Cadence Virtuoso

• Strong understanding of ESD, device breakdown, and reliability-first design approach

• Eagerness to learn, team-oriented, and open to feedback
  

Preferred Qualifications

• Experience in ASIC design for biomedical applications

• Comfortable with various version-control tools (SOS, git, etc)

• Able to work in multi-platform compute environment, especially as a strong Linux user

• Experience in scripting and automation

• Able to work constructively across all functions of the organization

• Organized, self-motivated, ability to effectively manage multiple projects and priorities; high attention to detail

• Effective interpersonal and communication skills

Benefits

Full-time employees are eligible for the following benefits listed below.

• Competitive base salary with equity

• 100% of healthcare coverage for you and your dependents

• Generous vacation policy

• Paid parental leave

• Work from our beautiful waterfront office in Alameda, CA, with access to collaborative spaces and labs.