Manufacturing Engineering Intern

At d-Matrix, we are focused on unleashing the potential of generative AI to power the transformation of technology. We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible. Our culture is one of respect and collaboration.

We value humility and believe in direct communication. Our team is inclusive, and our differing perspectives allow for better solutions. We are seeking individuals passionate about tackling challenges and are driven by execution.  Ready to come find your playground? Together, we can help shape the endless possibilities of AI. 

Manufacturing Engineering Intern

d-Matrix has fundamentally changed the physics of memory-compute integration with our digital in-memory compute (DIMC) engine. The “holy grail” of AI compute has been to break through the memory wall to minimize data movements. We’ve achieved this with a first-of-its-kind DIMC engine. Having secured over $154M, $110M in our Series B offering, d-Matrix is poised to advance Large Language Models to scale Generative inference acceleration with our chiplets and In-Memory compute approach. We are on track to deliver our first commercial product in 2024. We are poised to meet the energy and performance demands of these Large Language Models. The company has 100+ employees across Silicon Valley, Sydney and Bengaluru. 

Our pedigree comes from companies like Microsoft, Broadcom, Inphi, Intel, Texas Instruments, Lucent, MIPS and Wave Computing. Our past successes include building chips for all the cloud hyperscalers globally - Amazon, Facebook, Google, Microsoft, Alibaba, Tencent along with enterprise and mobile operators like China Mobile, Cisco, Nokia, Ciena, Reliance Jio, Verizon, AT&AT. We are recognized leaders in the mixed signal, DSP connectivity space, now applying our skills to next generation AI.  

Location:

Onsite at our Santa Clara, CA HQ 5 days per week.

Title: Intern, Manufacturing Engineering

Start date: 06/02/25; End Date: 08/15/25

The Role:

The Manufacturing Engineering Intern will engage with the Operations team at d-Matrix during the DVT and PVT builds of Corsair. The role will play a key part in “Active Yield Management” at the contract manufacturer. While working collaboratively on the tactical issues, the role will develop a framework to communicate the failure intensity, impact and exposure to the customer for all issues during the course of the builds.

What you will do:

·      Yield management through manufacturing and test processes at the contract manufacturer (SMT, BFT, Burn-in, Reliability Demonstration Tests)

·      Provide weekly readouts on the status of builds along with risks, impact and exposure

·      Set up cadence with CM partner on best practices for yield management

·      Review failure pareto from manufacturing tests (create dashboards from existing data if needed)

·      Develop statistical indicators for “critical to function” parameters extracted from manufacturing tests

·      Document Yield Bridges, develop dashboards for bonepile trackers using CM data and JIRA

·      Set up cadence for JIRA issues resolution pertaining to manufacturing issues

·      Understand the failure symptoms and RCCA for all failures

·      Ensure that 8D reports are created for trending failures

·      Evaluate results from product qualification tests (RDT, Burn-in, ESS etc.) and provide RCCA for ELFR and MTBF impacting issues

·      Develop second source component qualification methodology for Tier 1 components

What you will bring:

·      Master’s degree in electrical/ mechanical/industrial engineering or equivalent with 3 years of hands on experience in manufacturing/ design environment pertaining to hardware manufacturing

·      Knowledge of Printed Circuit Boards (PCB) industry, manufacturing processes

·      Basic programming knowledge in python and use of tools like JMP

·      Ability to troubleshoot issues and provide guidance when needed to the contract manufacturer

·      Strong communication skills to present technical readouts to management and peers

·      Also preferred

o   Hands-on experience/working knowledge of scripting languages such as Python and statistical software packages such as JMP would be useful for yield analysis and reporting

o   Understanding of ASIC/GPU design, manufacturing and testing would be beneficial to drive failure analysis and root cause of board level fallout.

Equal Opportunity Employment Policy

d-Matrix is proud to be an equal opportunity workplace and affirmative action employer. We’re committed to fostering an inclusive environment where everyone feels welcomed and empowered to do their best work. We hire the best talent for our teams, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. Our focus is on hiring teammates with humble expertise, kindness, dedication and a willingness to embrace challenges and learn together every day.

d-Matrix does not accept resumes or candidate submissions from external agencies. We appreciate the interest and effort of recruitment firms, but we kindly request that individual interested in opportunities with d-Matrix apply directly through our official channels. This approach allows us to streamline our hiring processes and maintain a consistent and fair evaluation of al applicants. Thank you for your understanding and cooperation.