Real job — pulled straight from Ciena’s careers page · Verified August 14, 2026 · No reposts.
Job description
Ciena is hiring a ASIC/FPGA Design Engineer — a full-time, based in Gurugram role. Apply directly on Ciena's careers page below.
ASIC/FPGA Design Engineer
Location: Gurugram
Time Type: Full time
Job Description
As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact.
Ciena India Private Limited seeks an ASIC/FPGA Design Engineer to contribute to the design, verification, and implementation of networking hardware. The role supports FPGA designs across data path and control functions and contributes throughout the product development lifecycle. Success in this position helps deliver reliable, high-performance networking solutions.
How you will make an impact:
Design, develop, and verify digital logic for ASICs and FPGAs using Verilog and SystemVerilog.
Contribute to VLSI design activities from specification through synthesis, place and route, and timing closure.
Perform logic simulation and analyze results to validate functional correctness and performance.
Collaborate on hardware-software integration to enable system operation.
Execute design bring-up, debugging, and validation activities in the lab.
Investigate customer issues and deliver resolutions.
Mentor new graduates and junior team members.
The must haves:
Education: Master’s degree in Electrical Engineering OR Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field.
Experience: 10+ years of progressive engineering experience, ideally within a product development company.
Application of ASIC and FPGA design methodologies.
Utilization of Verilog and SystemVerilog for digital design and verification.
Experience with IP integration and hardware-software integration.
Knowledge of transport system design and protocols including Ethernet and OTN, and interface protocols such as PCIe, SPI, I2C, and MDIO.
Application of back-end constraints and entry into vendor design flows.
Utilization of design tools such as Vivado and Quartus.
Problem-solving, analytical, and independent thinking applied to design challenges.
Communication and collaboration skills used in cross-functional environments.
Nice to haves:
Scripting knowledge using Tcl, Python, or Perl.
#LI-MP2
At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard. Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination.
Ciena is an Equal Opportunity Employer, including disability and protected veteran status.
If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.
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Frequently asked questions
What skills are required for ASIC/FPGA Design Engineer at Ciena?
The required skills for ASIC/FPGA Design Engineer at Ciena include: Verilog, SystemVerilog, Ethernet, PCIe, SPI, I2C, Python, Perl.
What is the seniority level for ASIC/FPGA Design Engineer at Ciena?
ASIC/FPGA Design Engineer at Ciena is a Staff level position.
How do I apply for ASIC/FPGA Design Engineer at Ciena?
You can view the full description and apply for ASIC/FPGA Design Engineer at Ciena on EchoJobs: https://echojobs.io/job/ciena-asic-fpga-design-engineer-l1ovr.