Real job — pulled straight from Ceva’s careers page · Verified October 28, 2026 · No reposts.
Job description
Ceva is hiring a Senior VLSI Design Engineer — a full-time, based in Ra'anana, Israel role. Apply directly on Ceva's careers page below.
Senior VLSI Design Engineer
Location: Ra'anana, Israel (IL) (IL)
Experience Level: Senior
Description
About the Business Unit
Ceva is at the forefront of next-generation cellular communication systems. We build licensable 5G modem IP for User Equipment (UE) and base stations, from IoT-class devices to high-throughput infrastructure. Our platforms target the latest 5G-Advanced releases.
A fast-growing focus is space and satellite infrastructure: 5G satellite networks that bring standard cellular connectivity to LEO/GEO satellites and direct-to-device links. This domain brings unique challenges, including large Doppler shifts, long round-trip delays, radiation-aware design and tight power budgets.
About the Role
As a Senior VLSI Designer, you'll lead the full design flow of advanced DSP cores and baseband hardware accelerators, from architecture to timing closure. This hands-on role is central to developing the IPs behind our next-generation modem products. It comes with strong cross-functional collaboration (algorithms, architecture, verification, backend and customers) and real technical ownership.
What You’ll Do
Design and implement high-performance 5G baseband DSP cores and hardware accelerators for transmit and receive chains.Develop programmable DSP architectures for multi-antenna systems, including satellite connectivity.
Own the design flow from architecture and RTL development through verification support, synthesis, and timing closure.
ptimize power, performance, and area (PPA) in collaboration with backend and cross-functional teams.
Work closely with algorithm, verification, backend, and software teams, as well as customers, from specification to silicon bring-up.
Requirements
- B.Sc./M.Sc. in Electrical Engineering
- 5–10 years of experience in VLSI design
- Proficiency in RTL design (Verilog/SystemVerilog), synthesis and timing analysis
- Familiarity with EDA tools (Synopsys, Cadence, Siemens EDA/Mentor)
- Strong understanding of digital design principles, SoC architecture and low-power techniques
- Excellent problem-solving and communication skills
Advantages
- Knowledge of signal processing and digital communication systems
- Experience with CDC/RDC analysis, DFT and multi-power-domain design
- Experience delivering licensable IP to external customers
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Frequently asked questions
What skills are required for Senior VLSI Design Engineer at Ceva?
The required skills for Senior VLSI Design Engineer at Ceva include: Verilog, SystemVerilog.
What is the seniority level for Senior VLSI Design Engineer at Ceva?
Senior VLSI Design Engineer at Ceva is a Senior level position.
How do I apply for Senior VLSI Design Engineer at Ceva?
You can view the full description and apply for Senior VLSI Design Engineer at Ceva on EchoJobs: https://echojobs.io/job/ceva-senior-vlsi-design-engineer-8oouf.